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TMS320F280049C: The question of ECC Calculation Algorithm in FLASH_API guide

Part Number: TMS320F280049C

Tool/software:

Hi everyone,

I’m currently working with the Flash API for the TMS320F28004X, and I’m implementing the ECC calculation as provided in the reference guide. Below is the function code from the documentation that calculates the ECC for a given 64-bit data block and address:

uint16 CalcEcc(uint32 address, uint64 data)
{
const uint32 addrSyndrome[8] = {0x554ea, 0x0bad1, 0x2a9b5, 0x6a78d, 0x19f83, 0x07f80, 0x7ff80, 0x0007f};
const uint64 dataSyndrome[8] = {0xb4d1b4d14b2e4b2e, 0x1557155715571557, 0xa699a699a699a699, 0x38e338e338e338e3,
0xc0fcc0fcc0fcc0fc, 0xff00ff00ff00ff00, 0xff0000ffff0000ff, 0x00ffff00ff0000ff};
const uint16 parity = 0xFC; // 奇偶校验位
uint16 eccVal = 0;
uint16 bit, eccBit;
uint64 xorData;
uint32 xorAddr;

debugaddr = address;
// Extract bits [20:2] from the address (aligned)
debugaddr_shift = (address >> 2) & 0x7FFFF;

// Calculate ECC for each bit
for (bit = 0; bit < 8; bit++)
{
// Address syndrome
xorAddr = (debugaddr_shift >> bit) & addrSyndrome[bit];
xorData = data & dataSyndrome[bit];

//Fold the masked address into a single bit for parity calculation.
//The result will be in the LSB.
//
xorAddr = xorAddr ^ (xorAddr >> 16);
xorAddr = xorAddr ^ (xorAddr >> 8);
xorAddr = xorAddr ^ (xorAddr >> 4);
xorAddr = xorAddr ^ (xorAddr >> 2);
xorAddr = xorAddr ^ (xorAddr >> 1);

xorData = xorData ^ (xorData >> 32);
xorData = xorData ^ (xorData >> 16);
xorData = xorData ^ (xorData >> 8);
xorData = xorData ^ (xorData >> 4);
xorData = xorData ^ (xorData >> 2);
xorData = xorData ^ (xorData >> 1);

// XOR address syndrome with corresponding data bits
eccBit = ((uint16)xorData ^ (uint16)xorAddr) & 0x0001;

// Add ECC bit to ECC value
eccVal |= (eccBit << bit);
}

// Add parity for odd bit parity
eccVal ^= parity;

return eccVal;

}

I’m currently trying to understand the input parameter data and how it correlates with the Flash memory structure. Here is the specific point I’m confused:

The function calculates an 8-bit ECC for 64-bit data. Does this mean the input data needs to be collected from 64 bits data which stored in 4 consecutive addresses in Flash memory to form one 64-bit data block for ECC calculation?

  • This function will calculate the ECC for a 64-bit aligned word including address. Yes you have to provide 64-bit data stored in 4 consecutive address(you can use 64-bit pointer).You can use  below code snippet.

     uint64 *LData, *HData;

    //
    // Point LData to the lower 64 bit data
    // and HData to the higher 64 bit data
    //
    LData = (uint64 *)(Buffer32 );
    HData = (uint64 *)(Buffer32 + 2);

    //
    // Calculate ECC for lower 64 bit and higher 64 bit data
    //
    ECC_LB = Fapi_calculateEcc(u32Index,*LData);
    ECC_HB = Fapi_calculateEcc(u32Index+4,*HData);
    ECC_B = ((ECC_HB<<8) | ECC_LB);

    Regards,

    Rajeshwary

  • Thank you so much for your detailed explanation and for providing the code snippet! Your response clarified my confusion regarding how to handle 64-bit aligned data and calculate ECC values correctly.

    Best regards,
    Riddy

  • Glad that your issue is resolved.

    Regards,

    Rajeshwary