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Tool/software:
Hi champs,
I am asking this for our customer.
The PIE related registers and interrupt tables for CPU1 and for CPU2 are different and independent, right?
But from CCS memory addressing, they seem same.
For example, PIEIER for CPU1 and for CPU2 are like below.
The user is confused why the memory addressing looks same for two CPU cores because they are different physical memories....
Would you please help us clarify?
Hi Wayne,
Yes, CPU1 and CPU2 have different ePIE modules in physical memory.
However, the addressing for both is the same. The register values you see in the memory browser (as well as in the Register View) should reflect the core that is selected as active in the Debug window.
Best Regards,
Delaney
