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TMS320F28P650DK: Use CPU1 to program a combined image for both CPU1 and CPU2

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: UNIFLASH

Tool/software:

Hi champs,

I am asking this for our customer.

Can the user use CPU1 to program a combined image for both CPU1 and CPU2 in the production line?

For example, 

CPU1 has a CPU1.out running on flash bank0/1/2.

CPU2 has a CPU2.out running on flash bank3/4.

The user converts each .out to .hex and combined them into a combined image ALL.hex.

Then, the user makes an SCI programmer using TI SCI ROM bootloader/SCI boot mode pins with the kernel using CPU1 to program ALL.hex on flash bank 0/1/2/3/4 once.

That is, in the kernel code, CPU1 configures all flash bank0/1/2/3/4 to CPU1 for programming.

On normal standalone mode, CPU1 configures bank0/1/2 to CPU1 and bank3/4 to CPU2 and run each .out accordingly.

Do you think it works?

 

  • Hi Wayne,

    There is a way to combine two application files manually through their .txt implementations, it's describe Section 6.4.1 of the CAN Flash Programming of C2000 Microcontrollers application note. This would work for your situation (then mapping banks per CPU as needed). Is this something you can try?

    Thanks and regards,

    Charles

  • Hi Charles,

    The user knows how to combine two .hex into one .hex.

    The point here is whether they can just use CPU1 to program all the 5 flash banks once?

    In this way, their production line operators only needs to load and program with one image once.

    Would you please confirm this?

  • Hi Wayne,

    Yes this is capable with the device. All 5 Flash Banks need to be mapped to CPU1 in the On-Chip Flash tool settings. 

    Thanks,

    Charles

  • Hi Charles,

    They make their own flash programmer by TI SCI ROM bootloader rather than use TI CCS/Uniflash, so there is no on-chip flash tool settings.

    In this case, they only need to map all 5 flash banks to CPU1 in their kernel code and load this kernel code from the host to F28P65x RAM via SCI by SCI boot mode pin. 

    Is our understanding correct?

  • Hi Wayne,

    All 5 Flash banks for the application will need to be mapped to CPU1, the kernel code only needs to be sent to RAM over SCI boot mode.

    Thanks,

    Charles