LAUNCHXL-F28379D: How to access CPU Status Register (ST0 and ST1) bit fields?

Hitesh Kumar

Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

I was trying to modify INTM bit & it took me a while to find them as they are not included in Technical Reference Manual.

Why are CPU Status Registers (ST0 and ST1) and their bit fields not included in the Technical Reference Manual ?

How to access CPU Status Register (ST0 and ST1) bit fields if I don't want to use any layers of abstraction between software and hardware?

9 days ago

0 Hitesh Kumar 9 days ago

Prodigy 80 points

++ and also the bit field of Interrupt Enable Register (IER) ?

0 Sira Rao80 6 days ago in reply to Hitesh Kumar

TI__Mastermind 24780 points

Please refer to www.ti.com/lit/spru430

Sections 2.3, 2.4, and A.1

Lori, is there a way to do what the user is asking?

+1 Lori Heustess 2 days ago

TI__Guru* 91085 points

IER and IFR are understood by the compiler itself. (reference www.ti.com/lit/spru514 section 6.5.2, cregister keyword)

IFR is read only and can be set with an OR operation. IFR can be cleared with an AND operation
IER can be used in an assignment, OR, and AND operation.

INTM can be modified by

EINT; - Disable interrupts. This is a macro in our standard header files
DINT; - Enable interrupts. Also a macro in our standard header files
unsigned int __enable_interrupts( ); - compiler intrinsic - ref www.ti.com/lit/spru514 table 7.6
unsigned int __disable_interrupts( ); - compiler intrinsic -- ref www.ti.com/lit/spru514 table 7.6

0 Lori Heustess 2 days ago in reply to Lori Heustess

TI__Guru* 91085 points

There are also some helper functions in c-callable assembly provided in C2000Ware. Refer to the driverlib directory below. c28x_core_registers.asm and .h files.

(this is missing in the F2837xD driverlib directory, but the CPU register access functions are the same)