Other Parts Discussed in Thread: C2000WARE
Tool/software:
Hello,
I'm using the HRPWM peripheral in up-count mode and am attempting to do high resolution period control. I am noticing that when I attempt to implement this, I'm getting a period that is shifting back and forth. So for example, I configure for a period of 686ns, and I will get one cycle that has a 686ns period, but then the following cycle will have a 690ns period. It seems very similar to this issue ( TMS320F28P659DK-Q1: Jitter using HRPWM in period mode ), but using the solution listed does not work for me (using their version of the SFO library). I am using the latest SFO library from C2000Ware v5.5. I have configured EDGMODE for BEP, CTLMODE set to 0 (for non phase control mode), HRLOAD to HR_CTR_ZERO_PRD, AUTOCONV to 1 (SFO confirmed working as expected in duty cycle mode), HRPE to 1. I noticed the issue happening with other chips as well, although at a different frequency. For example, on the 280039 controlCARD, I noticed this happening about every 7 cycles (getting the unexpected 690ns period). Can you think of any likely culprits configuration wise I might be getting wrong here? I did the HRPWM ex3 prd updown example and it seemed on its surface like it was working correctly. I attached images of the two different periods that show up. Let me know if I can provide any other useful information. Thanks!

