F29H850TU: Multicore debugging

I have a very similar issue trying to run the cpu1/3 blinky multicore with  CCS 20.2.0.12_180 on an F29H85X-SOM-EVM. Seems no either project or non-project based launches end up in the same way. That is both processors showing as running but no LED's blinking and looking like they are just processing NMI. They cant be paused,

The errors listed in the previous post occur when you try to load a program and if I do that I get the same result. However the comment in the code says load symbols. If you load just the symbols there is no error but the cores do not run.

Is there anything you can suggest to get this going or give some indication of when the documentation will be available?  

Simon / Mahmoud,

Have you followed the steps mentioned within the example header exactly, including changing bank modes in project-less debug? Do try this again, and if you still see any issues, please provide your exact steps and set-up to reproduce the issue. If you haven't already, download the latest F2x-SDK 1.02.

Best Regards,

Aishwarya

In have changed the bank modes to two for both projects, the ones ending _c29x1/3 although my understanding is that when _c29x1 is flashed it will also flash the application for core 3 so when it is released it will have the software to start. In that sense _c29x3 is never flashed directly so there should be no need to change the debug mode for that, Is that correct?

The steps taken

1. Import the led_ex1_blinky_cpu1_cpu3_multi project.

2. Switch both projects ending  _c29x1/3 to debug flash settings, bank mode 2.

3. Checked the other debug settings against here 7.1. Debug Overview — Code Composer Studio 20.3.0 Documentation. The flash settings are different to what i have presented but matched as best i can.

4.. Build both projects via the grouped led_ex1_blinky_cpu1_cpu3_multi project

5. Start project less debug by right clicking on _c29x1/targetConfigs/F29H859TU9.ccxml

6. Connect to C29xx_CPU1 and load via Run->Load->Load Program led_ex1_blinky_cpu1_cpu3_multi_c29x1.out.

7. Program loads, runs and halts at entry

.

8. Click the blue arrow to run the program which then halts at ESTOP after CPU3 is released. If that core is running at this point I would expect one of the LED's to be blinking but they are not.

9. Connect to CPU3 and Run->Load->Load Symbols  led_ex1_blinky_cpu1_cpu3_multi_c29x3.out

10. Attempt to run CPU1 which halts in an NMI

Could you please let me know what I am doing wrong? I have tried to Load Program on CPU3 and tried project based debug but they all end up in the same place.

Regards

Simon

Hi Aishwarya,
I've followed this approach and there is no difference in the output.

I have no idea when and where to check and do this as part of the debugging startup procedure I outlined earlier.

"Can you confirm the value of SSU_GEN_REGS.BANKMODE? It should be 0x9 for BANKMODE2. I noticed that the example does not include one necessary step which is to disconnect from the device and issue an XRSN to the device after configuring the BANKMODE in the Flash Settings tool".

Would you please let me know where to insert these steps in my list and how they can be achieved. I see nothing in the flash settings and cannot look at the BANKMODE via a watch.

I meant this approach 7.1. Debug Overview — Code Composer Studio 20.3.0 Documentation , when i try to load CPU3 by CPU1 it causes free running issue again but for CPU1 due to persistent fault state

After performing Run->Load->Load Program to CPU1 I stepped over Device_Init() and Board_Init in the example and watched SsuGenRegs.BANKMODE and it seems to be set to 3 despite setting it to 2 by right clicking on C29xx_CPU1 Properties->Flash Settings and setting the BANKMODE to 2.

I have now changed the procedure slightly and get different results.

1. From the debug panel start a debug session on F29H850Tu9.ccxml

2. Connect to CPU1

3. C29xx_CPU1 right click, properties, flash settings BANK MODE 2, click program bank management.

4. Run>Load->Load Program led_ex1_blinky_cpu1_cpu3_multi_c29x1.out

5. On entry SsuGenRegs.BANKMODE is now 9

6.Run CPU1 to ESTOP0

7. Connect to CPU3

8. Run>Load->Load Symbols led_ex1_blinky_cpu1_cpu3_multi_c29x3.out

9. Run CPU1

This still results in an NMI

I noticed on the Debug Output it explicitly says that the device must be reset through XRSn after programming BANKMGMT, how do you do that? Web suggests this is the reset pin so do you just press the reset button on the board?

Mahmoud,

Refer to my answer from yesterday where you should not load CPU3 program from CPU1. By loading CPU1 program, you are loading CPU1, CPU2, and CPU3 program because the CPU1.out file is a combined image of all the cores' programs. See above for exact steps.

Best Regards,

Aishwarya

Aishwarya,

Mahmoud and I are working on the same setup. We are using a firmware application under development, not an example project. Bankmode 2 is already selected. As I mentioned in the previous thread I follow the following steps:

right click core 1 target config file and choose Start Project-less Debug
connect core 1
load program core 1
run core 1 to ESTOP0
connect core 3
run core 3 and core 1
load symbols core 3
core 3 runs and halts as expected.
core 1 cannot be halted and debugger output shows: C29xx_CPU1: Warning: Target CPU may be stuck in a persistent fault state

Since core 1 is running and cannot be halted I can't tell what it's executing and how to troubleshoot this condition (Target CPU may be stuck in a persistent fault state). Note that it did halt at ESTOP0 (after the initial load program) but not again after that. Do you have any suggestions?

Robert,

Thanks for clarifying it is a custom project.

If you ever see that you are in an NMI, what are the values of the nmistruct? Can you share what is the result of the error handling scripts for both CPU1 and CPU3 ESM and EA? Refer to my first reply in this thread for how to do this. If you do not see anything via these two approaches, check the M0 RAM to see if any errors are saved there as explained below.

In addition, are you using the default provided lnk cmd or changes were made to it? This could also be the issue.

Best Regards,

Aishwarya

Aishwarya,

The results of the error handling scripts for both CPU1 and CPU3 ESM and EA are:

Do you see any issue in these script outputs?

What is the default provided lnk cmd?

Also,

I ran some tests and if I comment out the following in main() core1 is able to pause and continue as expected:

Robert,

As indicated by the error log, the error is related to the interrupt exit @0x1002064C. Ensure that you have the proper interrupt attribute whether it is an INT or RTINT. This is most likely the issue. You can refer to SysConfig board.h in any example project for this. If not already using SysConfig, do so to prevent such issues. 

I am referring to the default linker commands in the example projects as well as in the device_support folder.

Yes, that would make sense because the issue is related to interrupts. However, if you comment this out, no interrupts will be executed.

Best Regards,

Aishwarya

Aishwarya,

Thanks for the suggestion. 

1) Is there a way to map the interrupt exit address to the interrupt causing the issue?

2) How do you determine the proper attribute INT or RTINT for a given interrupt?

3) Latest EA status shows:

Similar question, how do you map this to determine what is causing the issue?

Robert,

Error Handling is explained in detail in the TRM + F29x Error Handling and Debug Guide. Please refer to this to understand how to debug errors. The next iteration of the TRM will have further details on the different errors and what they mean as well. 

Robert Quinn said:

1) Is there a way to map the interrupt exit address to the interrupt causing the issue?

What was that address pointing to exactly in both application code and Disassembly? The address will point to where the error is, so if you are seeing the issue is at a generic RETI.INT for example, you could set breakpoints or even comment out ISR to determine which one. Without knowing how your code is structured, I can only provide these generic suggestions. 

Robert Quinn said:

2) How do you determine the proper attribute INT or RTINT for a given interrupt?

Aishwarya Rajesh said:

You can refer to SysConfig board.h in any example project for this. If not already using SysConfig, do so to prevent such issues. 

Any F29x SDK example using interrupts generate the proper setup for interrupts in the board.h. As long as you have the attribute in the original definition of the interrupt, you do not need to repeat this throughout the code base.

Robert Quinn said:

3) Latest EA status shows:

Similar question, how do you map this to determine what is causing the issue?

As mentioned in the first answer, check what is at that memory and go from there. Refer to the resources as well. Looks like you may have changed your code which resulted in a different issue?

Best Regards,

Aishwarya