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XRS pin 80 of F28335 pulled low

Other Parts Discussed in Thread: TMS320F28335

hi

      I am using four TMS320F28335 on my board, I am able to debug and program 3 of them, I am using Blackhawk USB2000  and code composer version 4.  As I was trying to troubleshoot the problem, why  I am not able to program one processor.   I observe following things:

1. Reset Pin XRS (pin 80)  is pulled low for 500 micro second. This happens at a frequency  of 217 Hz always,  when the external oscillator is connected.

2.  when external oscillator is not connected the reset  pin does not go low.

3. The external clock is stable and provide 30MHz signal.

4. We removed external watchdog, still the above mention condition is occurring.

5. Our dual voltage regulator also provides external reset, both reset pin of the regulator were lifted from board, still the above mention condition is occurring.

if I am not mistaking the only thing that can pull the reset pin low is the chips internal watch dog.  Is it possible that the chip is code protected and might have a code which does not disable the internal watch dog. please provide the possible cause for above said problem.

Looking at the reset pin XRS signal on the scope, the falling edge is rapid and is being actively sharply pulled down (ie transistor action).  All external reset devices (watchdog and reset pins of voltage regulator were removed).  This appears to be TMS internally generated reset with WDRST buffer pulling pin 80 XRS pin LOW at 217Hz or 4.6msec repetitively (ie digitally timed precision).  We have external pull up resistors on the XRS reset line to preclude noise induced spurious external reset.

What we are hoping to learn are the conditions which lead WDRST buffer pulling pin 80 XRS pin LOW and why it involves the 4.6msec interval, assuming our understanding of the WDRST buffer being connected to the pin 80 XRS pin is correct.

thank you

Amol

  • By default on powerup, the PLL is bypassed and the watchdog divides the clock down at /512.  The watchdog counter is 8-bits.  Therefore you have (512*(2^8)/30M) = about 4ms in your code to disable or service the watchdog, otherwise the device will be reset. When you connect with the JTAG, the device should be held in HALT, which should prevent the device from being reset by the watchdog.  

  • Devin 

    what is remedy for such problem?

    because i am also facing same problem.

    regards

    nikhil

  • nikhil,

    At the beginning of your code, disable or service the watchdog.  If you choose to service it, you will need to keep servicing the watchdog before the timer expires throughout your application.