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TMS320F28P650DK: Implmenting lockstep and using LCM

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: C2000WARE

So I was trying to learn lockstep Compare Module and implementing it on the LAUNCHXL - F28P65X board.But I am not able to get any resource or expamples for this .

If there are any documentation or resouce please help with that

  • Hi,

    Have you tried the example in this folder:

    {C2000Ware_directory}\libraries\diagnostic\f28p65x\examples\test_application

    It demonstrates how to use the STL_LCM functions.

    There's some documentation on this example here:

    https://dev.ti.com/tirex/content/C2000Ware_5_00_00_00/libraries/diagnostic/f280015x/docs/html/sta/index.html

    Thanks

  • Hey Prartan,

    I went through the document you provide but it provides only the self test explanation.I wanted to understand since we can only implement lockstep in CPU2 and the redundant core has the to be DMA2 then how does the DMA executes the same instructions with the 2 cycles delay. Wanted to understand the working of this in more depth. Is there any documentation on how to implement the lockstep as such?

  • I wanted to understand since we can only implement lockstep in CPU2 and the redundant core has the to be DMA2 then how does the DMA executes the same instructions with the 2 cycles delay.

    I think there is some misunderstanding here.

    CPU2 is in lockstep with Shadow CPU2, CPU2 is NOT in lockstep with DMA2. DMA2 has its own shadow DMA which it lock's step with.

    I would highly recommend you start with reference manual Lockstep chapter, Read few E2E thread's like this -  https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1389812/tms320f28p650dh-what-is-included-in-cpu2-ie-primary-module-and-shadow-cpu-of-cpu2-used-for-lockstep  

  • Hey,

    So I read the technical manual and just to clarify my understanding to demonstrate the lockstep working I need to add LCM.c and LCM.h in any driverlib project and I can use the Comparator Error Force test using a GPIO input button which sets the LCM_CONTROL.CMPx_ERR_FORCE bit which in-turns  trigger an NMI and write my own ISR and read the LCM_STATUS to identify that the interrupt was trigger due to CMPx_ERR_FORCE_DONE bit is set.

    Is this correct?

  • I can use the Comparator Error Force test using a GPIO input button

    Not sure what you mean by -  "using GPIO input button" ? 

    Yes you can use LCM.c and LCM.h driverlib api to run the tests.

    The demonstration of the LCM tests are part of c2000Ware self test application which I pointed out before, did you try them ? - {C2000Ware_directory}\libraries\diagnostic\f28p65x\examples\test_application

    Have you tried the example in this folder:

    {C2000Ware_directory}\libraries\diagnostic\f28p65x\examples\test_application

    It demonstrates how to use the STL_LCM functions.

    Thanks

  • Yes i read that example but in that as well I was not ablt to generate the NMI even after adding the

    Interrupt_register(INT_NMI, nmiISR);

    So instead trying that I went to try "Comparator Error Force Test" which if passed triggers an nmi right?

    So as mentioned in the document I locked the the LSEN configuration-> then enabled the comparator in the CPU2 code. All the basic functions are called properly.

        EALLOW;
        HWREG(CPUSYS_BASE + SYSCTL_O_CPUSYSLOCK2) |= SYSCTL_CPUSYSLOCK2_LSEN;
        EDIS;
        LCM_enableLockstepCompare(LCM_CPU2_BASE);
    cleared the flags then  called the comparator error force test function
    LCM_runComp1ErrorForceTest(LCM_CPU2_BASE);
    ( this is done without debugger and i have inited the interrupt vector table) 

        for(i = 3U; i < 224U; i++)
        {
            HWREG(PIEVECTTABLE_BASE + (2U * i)) =
                (uint32_t)Interrupt_defaultHandler;
        }

        //
        // NMI and ITRAP get their own handlers.
        //
        HWREG(PIEVECTTABLE_BASE + ((INT_NMI >> 16U) * 2U)) =
           (uint32_t)Interrupt_nmiHandler;
        HWREG(PIEVECTTABLE_BASE + ((INT_ILLEGAL >> 16U) * 2U)) =
            (uint32_t)Interrupt_illegalOperationHandler;

        EDIS;
    }
    This should trigger an nmi right ?
  • So instead trying that I went to try "Comparator Error Force Test" which if passed triggers an nmi right?

    Yes you should see NMI getting triggered if debugger is not connected.

    The self test application also has compare error force test check in addition to self tests, Please check the self test application.

    Thanks

  • Hey there,

    So read the self test application and with the reference to it used the files sta_main.c and sta_testd usign the lines given below:

     //enabled the LCM
     HWREG(CPUSYS_BASE + SYSCTL_O_CPUSYSLOCK2) |= SYSCTL_CPUSYSLOCK2_LSEN;
    //enabled the comparision
    HWREG(LCM_CPU2_BASE + LCM_O_CONTROL) |= LCM_CONTROL_CMPEN;
    // cleared the gflag
    HWREG(SYSSTAT_BASE + SYSCTL_O_LCM_ERR_FLG_CLR) =
    SYSCTL_LCM_ERR_FLG_CLR_GERR | SYSCTL_LCM_ERR_FLG_CLR_CPU;

        EALLOW;
        HWREG(LCM_CPU2_BASE + LCM_O_CONTROL) |= LCM_CONTROL_CMP1_ERR_FORCE;
        EDIS;
     still the NMI is not getting triggered
  • Hey there,

    So read the self test application and with the reference to it used the files sta_main.c and sta_testd usign the lines given below:

        DINT;
        Interrupt_initModule();
        Interrupt_initVectorTable();
        // Clear ALL NMI flags BEFORE enabling NMI
       
        EALLOW;
        HWREGH(NMI_BASE + NMI_O_FLGCLR) = 0xFFFF;
        HWREGH(NMI_BASE + NMI_O_CFG) |= NMI_CFG_NMIE;
        EDIS;

        //
        // Initialize vector table and register NMI handler
        //
        Interrupt_register(INT_NMI, &nmiISR);

        //
        // Enable interrupts
        //
        EINT;
        ERTM;
     
    //enabled the LCM
     HWREG(CPUSYS_BASE + SYSCTL_O_CPUSYSLOCK2) |= SYSCTL_CPUSYSLOCK2_LSEN;
    //enabled the comparision
    HWREG(LCM_CPU2_BASE + LCM_O_CONTROL) |= LCM_CONTROL_CMPEN;
    // cleared the gflag
    HWREG(SYSSTAT_BASE + SYSCTL_O_LCM_ERR_FLG_CLR) =
    SYSCTL_LCM_ERR_FLG_CLR_GERR | SYSCTL_LCM_ERR_FLG_CLR_CPU;

        EALLOW;
        HWREG(LCM_CPU2_BASE + LCM_O_CONTROL) |= LCM_CONTROL_CMP1_ERR_FORCE;
        EDIS;
     still the NMI is not getting triggered.