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Why the ePWM8A (GPIO 14) and ePWM8B (GPIO15) are in the same phase?

Jin Li104245
Prodigy 20 points

I was trying to use F25M35H52C1 DSP to generate 18 PWM signals. I found that the ePWM8A (GPIO 14) and ePWM8B (GPIO15) are in the same phase, but the A and B outputs of all the other eight ePWM units are in the reverse (opposite) phase. Could anybody help me check what's wrong in the setting of my PWM Unit 8? I test this with TI's TMDXDOCKH52C1 development kit.

  • 0
    TI__Genius 15260 points

    Hello,

    Could you please post your PWM initialization code?  Thanks,

    Kris

  • 0 in reply to Kris Parrent
    Prodigy 20 points

    I was using VisSim blocks to test all those 9 ePWM units, and put jumper pins 20 & 21 for GPIO 14&15 on the AB connectivity Mux to see the signals on the TMDXDOCKH52C1. 


    I also asked for help with the VisSim Support Team, here are their reply.

    'Our lab techs have found that the 8B/GPIO15 signal is not coming out for us at all. The 8A/GPIO14 signal is OK. Note that your attached VisSim diagram did not have deadband enabled for any channel. We suggest using a simple constant input like .5 to check A/B waveform phase as in the attached diagram. This diagram can be directly downloaded after compile.
     
    You should contact TI to see if there is a known issue with PWM8B/GPIO15 on the F28M35H52 controlCARD. Note that you have to jumper pins 20 & 21 on the AB connectivity Mux to see the signals on the TMDXDOCK.'
    Here are the auto generated C code.
    /*** VisSim Automatic C Code Generator Version 8.0A35 ***/
    /*  Output for C:\Users\Jin Li\Desktop\testPwmF28M35H52.vsm at Thu Apr 19 16:41:00 2012 */


    #include "math.h"
    #include "cgen.h"
    #include "cgendll.h"
    #include "c2000.h"

    extern CGDOUBLE Zed;

    DLL_SIG_DECL_M(2,0)
    INTERRUPT void cgMain();
    static ARG_DESCR outArgInfo10[]={
    0};
    static ARG_DESCR inArgInfo10[]={
      { T_SCALED_INT,0,1,16},
      { T_SCALED_INT,0,1,16},
    };
    static SIM_STATE tSim={0, 0.0001, 10,0,0.0001,0,0,0,0,0,0,0,0
    ,outArgInfo10, inArgInfo10,2,0,0,0,0,cgMain,0,0,0,0,0,0,1};
    SIM_STATE *sim=&tSim;

    /* ePWM Test */
    INTERRUPT void cgMain()
    {
      GET_MAX_STACK_USED();
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA1 = (int)(_duty32>>15);
      }
      CMPB1 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA2 = (int)(_duty32>>15);
      }
      CMPB2 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA3 = (int)(_duty32>>15);
      }
      CMPB3 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA4 = (int)(_duty32>>15);
      }
      CMPB4 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA5 = (int)(_duty32>>15);
      }
      CMPB5 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA6 = (int)(_duty32>>15);
      }
      CMPB6 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA7 = (int)(_duty32>>15);
      }
      CMPB7 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);
      { long _duty32 = (long) sim->inSigS[0]->u.scaledInt.val*15000;
        CMPA8 = (int)(_duty32>>15);
      }
      CMPB8 = (int)(((long) sim->inSigS[1]->u.scaledInt.val*15000)>>15);

      endOfSampleCount = TIMER2TIM;

    }

    main()
    {
      noIntegrationUsed = 1;
      EALLOW;
      CLKCTL = 0X4000;
      CLKCTL = 0X4505;
      PLLSTS = 0x10; // reset clk check
      WDCR=0x00ef;    // Disable Watchdog
      asm("    clrc DBGM");
      if (!(PLLSTS&8))    // Skip PLL set if OSC failure
        { PLLSTS = 0x40;    //Disable OSC check
          PLLCR = 0x14;    // set PLL to 10xOSC = 150 MHZ;
          PLLSTS = 0x100;    //Enable OSC check (&F283xx /2 mode)
        }
      PCLKCR |= 0xc;
      HISPCP = 0x0;    // HCLK  = 150 MHZ
      PCLKCR1 = 0xFF;
      PCLKCR3 = 0x400;
      EDIS;
      TBPRD1 = 0x3a98;
      AQCTLA1 = 0x90;
      AQCTLB1 = 0x600;
      DBCTL1 = 0xb;
      DBRED1 = 0x5;
      DBFED1 = 0x5;
      EALLOW;
      TZCTL1 = 0x0;
      TZSEL1 = 0x0;
      DCACTL1 = 0x0;
      DCBCTL1 = 0x0;
      EDIS;
      TBPRD2 = 0x3a98;
      AQCTLA2 = 0x90;
      AQCTLB2 = 0x600;
      DBCTL2 = 0xb;
      DBRED2 = 0x5;
      DBFED2 = 0x5;
      EALLOW;
      TZCTL2 = 0x0;
      TZSEL2 = 0x0;
      DCACTL2 = 0x0;
      DCBCTL2 = 0x0;
      EDIS;
      TBPRD3 = 0x3a98;
      AQCTLA3 = 0x90;
      AQCTLB3 = 0x600;
      DBCTL3 = 0xb;
      DBRED3 = 0x5;
      DBFED3 = 0x5;
      EALLOW;
      TZCTL3 = 0x0;
      TZSEL3 = 0x0;
      DCACTL3 = 0x0;
      DCBCTL3 = 0x0;
      EDIS;
      TBPRD4 = 0x3a98;
      AQCTLA4 = 0x90;
      AQCTLB4 = 0x600;
      DBCTL4 = 0xb;
      DBRED4 = 0x5;
      DBFED4 = 0x5;
      EALLOW;
      TZCTL4 = 0x0;
      TZSEL4 = 0x0;
      DCACTL4 = 0x0;
      DCBCTL4 = 0x0;
      EDIS;
      TBPRD5 = 0x3a98;
      AQCTLA5 = 0x90;
      AQCTLB5 = 0x600;
      DBCTL5 = 0xb;
      DBRED5 = 0x5;
      DBFED5 = 0x5;
      EALLOW;
      TZCTL5 = 0x0;
      TZSEL5 = 0x0;
      DCACTL5 = 0x0;
      DCBCTL5 = 0x0;
      EDIS;
      TBPRD6 = 0x3a98;
      AQCTLA6 = 0x90;
      AQCTLB6 = 0x600;
      DBCTL6 = 0xb;
      DBRED6 = 0x5;
      DBFED6 = 0x5;
      EALLOW;
      TZCTL6 = 0x0;
      TZSEL6 = 0x0;
      DCACTL6 = 0x0;
      DCBCTL6 = 0x0;
      EDIS;
      TBPRD7 = 0x3a98;
      AQCTLA7 = 0x90;
      AQCTLB7 = 0x600;
      DBCTL7 = 0xb;
      DBRED7 = 0x5;
      DBFED7 = 0x5;
      EALLOW;
      TZCTL7 = 0x0;
      TZSEL7 = 0x0;
      DCACTL7 = 0x0;
      DCBCTL7 = 0x0;
      EDIS;
      TBPRD8 = 0x3a98;
      AQCTLA8 = 0x90;
      AQCTLB8 = 0x600;
      DBCTL8 = 0xb;
      DBRED8 = 0x5;
      DBFED8 = 0x5;
      EALLOW;
      TZCTL8 = 0x0;
      TZSEL8 = 0x0;
      DCACTL8 = 0x0;
      DCBCTL8 = 0x0;
      EDIS;
      EALLOW;
      GPAMUX1 = 0x55555555;
      GPBMUX1 = 0x0;
      GPCMUX1 = 0x0;
      GPEMUX1 = 0x0;
      EDIS;
     simInit( &tSim );
      startSimDsp();
      installInterruptVec(-2,7,cgMain);
      TIMER2PRD = 0x3a98; // 32-bit Timer Period Low
      TIMER2PRDH = 0x0; // 32-bit Timer Period High
      TIMER2TCR |= 0x4020; //Interrupt enable, Timer Reset
      EALLOW;
      PIECTRL = 1; // Enable PIE Interrupts
      EDIS;
      IER |= 0x2000; //CPU Interrupt enable
      resetInterrupts();
      disable_interrupts();  // Disable interrupts until PC handshake complete
      TBCTL1 = 0x12; // Start timer
      TBCTL2 = 0x12; // Start timer
      TBCTL3 = 0x12; // Start timer
      TBCTL4 = 0x12; // Start timer
      TBCTL5 = 0x12; // Start timer
      TBCTL6 = 0x12; // Start timer
      TBCTL7 = 0x12; // Start timer
      TBCTL8 = 0x12; // Start timer
      dspWait();
    }


  • 0 in reply to Jin Li104245
    TI__Genius 15260 points

    It sounds like VisSim may not have the latest header files for this device.  We need to make sure the M3 is releasing control of GPIO15 to the C28x.  You can refer to this thread for instructions on how to do that:

    http://e2e.ti.com/support/microcontrollers/tms320c2000_32-bit_real-time_mcus/f/171/t/178777.aspx#648205

    I also recommend to make sure you are using the v120 header files as these will have the latest bug fixes.  I'd recommend it to VisSim too :)

    Let's try that first and see what happens.

    Kris