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Engineer Question:
What is the proper way to configure the HRPWM for hi-res duty and period control in up-down count (symmetric) mode? (Piccolo and newer devices)
Answer:
The following provides all the steps necessary to correctly configure the PWM module/s for hi-res duty and period control in up-down count mode. Failure to follow this procedure can result in unpredictable behavior.
// Disable TBCLKSYNC EALLOW; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; EDIS; //Write To CMP, TBPRD, TBPHS registers. (*ePWM[j]).TBCTL.bit.PRDLD = TB_SHADOW; // set Shadow load (*ePWM[j]).TBPRD = period; // PWM frequency = 1/(2*TBPRD) (*ePWM[j]).CMPA.half.CMPA = period / 2; // set duty 50% initially (*ePWM[j]).CMPA.half.CMPAHR = (0 << 8); // initialize HRPWM extension (*ePWM[j]).TBPHS.all = 0; //Configure modes, clock dividers and action qualifier (*ePWM[j]).TBCTR = 0; (*ePWM[j]).TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Select up-down count mode (*ePWM[j]).TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE; (*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV1; (*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV1; // TBCLK = SYSCLKOUT (*ePWM[j]).TBCTL.bit.FREE_SOFT = 00; (*ePWM[j]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // LOAD CMPA on CTR = 0 (*ePWM[j]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; (*ePWM[j]).CMPCTL.bit.SHDWAMODE = CC_SHADOW; (*ePWM[j]).CMPCTL.bit.SHDWBMODE = CC_SHADOW; (*ePWM[j]).AQCTLA.bit.CAU = AQ_SET; (*ePWM[j]).AQCTLA.bit.CAD = AQ_CLEAR; (*ePWM[j]).AQCTLB.bit.ZRO = AQ_SET (*ePWM[j]).AQCTLB.bit.PRD = AQ_CLEAR; //Configure HRPWM registers EALLOW; (*ePWM[j]).HRCNFG.all = 0x0; (*ePWM[j]).HRCNFG.bit.EDGMODE = HR_BEP; // MEP control on both edges (*ePWM[j]).HRCNFG.bit.CTLMODE = HR_CMP; // CMPAHR and TBPRDHR HR control (*ePWM[j]).HRCNFG.bit.HRLOAD = HR_CTR_ZERO_PRD; // load on CTR = 0 and CTR = TBPRD (*ePWM[j]).HRCNFG.bit.AUTOCONV = 1; // Enable autoconversion (*ePWM[j]).HRPCTL.bit.HRPE = 1; // Turn on high-resolution period control //set TBCTL[PHSEN] = 1 (*ePWM[j]).TBCTL.bit.PHSEN = 1; //set HRPCTL[TBPHSHRLOADE] = 1 (*ePWM[j]).HRPCTL.bit.TBPHSHRLOADE = 1; //Do the same to all other PWM modules … //Enable TBCLKSYNC SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; //Perform a software sync EPwm1Regs.TBCTL.bit.SWFSYNC = 1; … //Disable TBCTL[PHSEN] and HRPCTL[TBPHSHRLOADE] if not needed by the application code
Hi,
Is it possible to use the HRPWM with up/down count mode in F28335 DSP?.
There are some registers that you are setting-up in your code and they are not available in the F28335.
thank in advance.
Fernando.
Hi Fernando,
It is possible to use HRPWM in up-down count mode on F28335 devices. However, unlike Piccolo devices, high resolution period control is not possible.
- Hrishi
Hi Lori Heustess,
I want to configure the HRPWM for hi-res duty and period control in up-down count (symmetric) mode for ePWM1,3,4,5, the duty cycles and period are updated by CLA_task, I try to implement it as following (in .cla file):
#include "SFO_V6.h"
#pragma DATA_SECTION(status,"ClaDataRam0");
volatile Uint16 status;
#pragma DATA_SECTION(MEP_ScaleFactor,"ClaDataRam0");
volatile int MEP_ScaleFactor;
//in CLA_task:
status = SFO();
EPwm1Regs.TBPRD = PRD_INT;
EPwm3Regs.TBPRD = PRD_INT;
EPwm4Regs.TBPRD = PRD_INT;
EPwm5Regs.TBPRD = PRD_INT;
EPwm1Regs.TBPRDHR = PRD_FRAC*256;
EPwm3Regs.TBPRDHR = PRD_FRAC*256;
EPwm4Regs.TBPRDHR = PRD_FRAC*256;
EPwm5Regs.TBPRDHR = PRD_FRAC*256;
I got #17003-D and #10015-D output file......... errors, could you tell me how to fix it? and whether SFO() can use in CLA_task? And how to implement its?
Thank you!
I am using HRPWM (of F28035) for controlling the DC/DC converter with period and duty variable (f=80-250kHz), but my converter had broken when I enabled HRPWM mode, whether HRPWM is resonable for this applications?
Could I use DB submode for deatime setting for multichanels HRPWM?
And if I force HRPWM chanels synchronous through SWFSYNC bit, whether deadtime is guaranteed?
Thank you!