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TMS320F28379D: HRPWM: Initial synchronization for symmetric (up-down) duty control

Part Number: TMS320F28379D

Hello everyone,

I need modules ePWM1 to ePWM8 to work with symmetric high resolution duty control. All ePWM modules have the same period (TBPRD) but they have different phases (TBPHS).

I am able to obtain the desired behaviour on one ePWM by following the procedure described in the TRM (15.2.4.4.1 High-Resolution Period Configuration). However I would like a bit more information about the initial synchronization at steps 8-9.

As far as I understand:

  • The HRPWM will not work if I don't perform this initial configuration
  • The HRPWM will not work if this initial configuration is not performed while the timebase clock is running (PCLKCR0[TBCLKSYNC]= 1)

The above is very clear from the manual, but what is not very clear is what I can and cannot do after the initial synchronization. So my question is the following:

If I stop the timebase clock for some time (PCLKCR0[TBCLKSYNC]= 0) and restart it later, will the HRPWM keep performing correctly or does it need to be resynchronized?

Cheers,

Pierre

  • Hi Pierre,

    Do you need hi-res phase shift control OR will phase shift control with regular resolution suffice? Writing to PCLKCR0[TBCLKSYNC] enables/disables clocking of all PWM modules. All PWMs should work normally once re-enabled, especially if you do not need hi-res phase shift control. I think PWMs should work even if you require hi-res phase shift control but I am a bit less certain of this.

    Please note that disabling and enabling TBCLKSYNC may put PWM outputs in a continuous high/low/hi-Z state till the clocks are re-enabled and the next configured event (Action Qualifier, Dead Band, etc) takes place. 

    I hope this helps.

    Hrishi

  • Hi Hrishi,

    I do not need hi-res phase shift control. Regular phase shift resolution is perfectly fine.

    Can you tell me if the HRPWM will keep working properly if I perform the following sequence:

    1. Configure HRPWM for hi-res duty control but no hi-res phase shift control (TBCLKSYNC enabled)
    2. Do other things for a while, then after some time, disable TBCLKSYNC.
    3. Update TBPHS (while TBCLKSYNC is disabled).
    4. Set SWFSYNC (while TBCLKSYNC is disabled).
    5. Do other things for a while, then after some time, enable TBCLKSYNC.

    Setting SWFSYNC before enabling TBCLKSYNC has worked for me in previous projects, but I have never used it with this HRPWM configuration (symmetric duty control), so I'd like to know if it is going to interfere with the up-down hi-res duty control.

    Cheers,

    Pierre

  • Pierre,

    I think this should be fine. By the way, as you are disabling TBCLKSYNC anyway, you could directly write to the TBCTR register in addition to TBPHS and avoid using SWFSYNC altogether.

    Hrishi
  • Hrishi,

    Thank you for your suggestion regarding TBCTR but since I am in up-down count I also need to take care of the direction. The way I do it currently is with TBCTL[PHSDIR]. I'm not aware of a way to "write" TBSTS[CTRDIR] in the same manner you can write TBCTR. Is there?

    Pierre

  • Pierre,

    In that case software forced sync is the way to go.

    Hrishi
  • Perfect, thanks a lot