SPISIMOB is constantly held low in F28069 Experimenter Board

Gustav Lund

Prodigy 50 points

Hi,

I am trying to use the SPIB in the F28069 Experimenter Board and the SPISIMOB (GPIO12) is constantly held low.

Both SPICLKB (GPIO14) and SPISTEB (GPIO15) seem to work.

If I use a different code, let's say Example_2806xLEDBlink and configure GPIO12 to toggle, this pin works fine.

I've started with Example_2806xSpi_FFDLB project, but by now, I've already tried to use the SPIB with and without FIFO.

The codes goes like:

#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

#define CPU_FREQ    90E6
#define LSPCLK_FREQ CPU_FREQ/4
#define SCI_FREQ    100E3
#define SCI_PRD     (LSPCLK_FREQ/(SCI_FREQ*8))-1

// Prototype statements for functions found within this file.
interrupt void sciaTxIsr(void);
interrupt void sciaRxIsr(void);
interrupt void xint1_isr(void);
interrupt void cpu_timer0_isr(void);

void error(void);

void spi_xmit(Uint16 a);
void spi_fifo_init(void);
void spi_init(void);
Uint8 SPI_SendByte(Uint8 spi_tx_data);

void scia_init(void);
void scia_xmit(int data);
void scia_msg(char *msg);

Uint16 ReceivedChar; // Received data for SCI-A
char *message; // Used to transmit

void main(void)
{
   Uint16 sdata; // send data MAKE SURE ONLY 8-bit data is written!
   Uint16 rdata; // received data SPI RX buffer is 16-bit
   long long_delay;

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2806x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO:
// This example function is found in the F2806x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//   InitGpio();
// Setup only the GP I/O only for SCI-A and SCI-B functionality (SCI-A = RS232 and SCI-B = RS485)
// This function is found in F2806x_Sci.c
   InitSciaGpio();
   InitScibGpio();

// Setup only the GP I/O only for SPI-B functionality
// This function is found in F2806x_Spi.c
   InitSpibGpio();
//

   EALLOW;
   GpioCtrlRegs.GPBPUD.bit.GPIO43 = 0;      // Pullup's enabled for GPIO43

   //GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 0;   // XINT1 is GPIO0
   GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 43;   // XINT1 is GPIO43

   GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0xFF;   // Each sampling window is 510*SYSCLKOUT

    // Configure GPIO31 and GPIO34 as a GPIO output pin => LED2 and LED3 respectively
   GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 0;
   GpioCtrlRegs.GPADIR.bit.GPIO31 = 1;
   GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;
   GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;

   EDIS;

   // Init LEDs
   GpioDataRegs.GPASET.bit.GPIO31 =1;     // LED2 is enable low, therefore LED2=OFF
   GpioDataRegs.GPBCLEAR.bit.GPIO34 =0;   // LED3 is enable low, therefore LED3=ON

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2806x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2806x_DefaultIsr.c.
// This function is found in F2806x_PieVect.c.
   InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
   EALLOW; // This is needed to write to EALLOW protected registers
   PieVectTable.XINT1 = &xint1_isr;
   PieVectTable.SCIRXINTA = &sciaRxIsr;
   PieVectTable.SCITXINTA = &sciaTxIsr;
   PieVectTable.TINT0 = &cpu_timer0_isr;
   EDIS;   // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
// This function is found in F2806x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
   scia_init(); // Init SCI-A
// spi_fifo_init();      // Initialize the Spi FIFO
   spi_init();          // init SPI
   InitCpuTimers();   // For this example, only initialize the Cpu Timers
// Configure CPU-Timer 0 to interrupt every 500 milliseconds:
// 90MHz CPU Freq, 50 millisecond Period (in uSeconds)
   ConfigCpuTimer(&CpuTimer0, 90, 500000);

// To ensure precise timing, use write-only instructions to write to the entire register. Therefore, if any
// of the configuration bits are changed in ConfigCpuTimer and InitCpuTimers (in F2806x_CpuTimers.h), the
// below settings must also be updated.

   CpuTimer0Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0

// Step 5. User specific code, enable interrupts:
// Enable interrupts required for this example
   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
   PieCtrlRegs.PIEIER1.bit.INTx4 = 1;   // PIE Group 1.4 External Interrupt INT1
   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9.1 SCIRXINTA
   PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9.2 SCITXINTA
   IER = 0x100; // Enable CPU INT
   IER |= M_INT1;

// Enable TINT0 in the PIE: Group 1 interrupt 7
   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;   // PIE Group 1.7 TINT0

// Enable global Interrupts and higher priority real-time debug events:
   EINT;   // Enable Global interrupt INTM
   ERTM;   // Enable Global realtime interrupt DBGM

// Step 6. IDLE loop. Just sit and loop forever (optional):
   ReceivedChar = 'O';
   message = "Hello World! \n";
   scia_msg(message);
   scia_xmit(0x0D); //Send Line Feed

   for(;;) SPI_SendByte(0xaa);
/* sdata = 0xFE;
   for(;;)
   {
     rdata = SPI_SendByte(sdata);
   if(rdata != sdata) error();
     sdata++;
     if(sdata == 0x100) sdata=0;
   }*/
}

void error(void)
{
   __asm("     ESTOP0"); // Test failed!! Stop!
   scia_msg("Error detected! Program Halted!\n");
   for (;;);
}

interrupt void xint1_isr(void)
{
   scia_msg("UART TX ISR REACHED!\n");
   // Acknowledge this interrupt to get more from group 1
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

interrupt void sciaTxIsr(void)
{
    PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
    SciaRegs.SCICTL2.bit.TXINTENA =0;
}

interrupt void sciaRxIsr(void)
{
   ReceivedChar = SciaRegs.SCIRXBUF.all; // Read data
   PieCtrlRegs.PIEACK.all|=0x100;         // Issue PIE ack
   scia_xmit(ReceivedChar);
   GpioDataRegs.GPATOGGLE.bit.GPIO31 = 1; //Toggle LED2
}

interrupt void cpu_timer0_isr(void)
{
   CpuTimer0.InterruptCount++;
   // Acknowledge this interrupt to receive more interrupts from group 1
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
   GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1; //Toggle LED3
}

void scia_init()
{
   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit, No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE
   SciaRegs.SCICTL2.bit.TXINTENA =0; // Disable TX ISR
   //SciaRegs.SCICTL2.bit.TXINTENA =1; // Enable TX ISR
   SciaRegs.SCICTL2.bit.RXBKINTENA =1;
   SciaRegs.SCIHBAUD = 0x00; // This is for 115200bps
   SciaRegs.SCILBAUD = 0x17; // This is for 115200bps
   //SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
   SciaRegs.SCICCR.bit.LOOPBKENA =0; // Disable loop back
   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
}

// Transmit a character from the SCI
void scia_xmit(int data)
{
   //SciaRegs.SCICTL2.bit.TXINTENA =0;
   while (SciaRegs.SCICTL2.bit.TXRDY != 1) {} // Wait until TXBUF is ready to TX
   SciaRegs.SCITXBUF=data;
   while (SciaRegs.SCICTL2.bit.TXEMPTY == 1) {} // Wait until TX is done
}

void scia_msg(char *msg)
{
    int i;
    i = 0;
    while(msg[i] != '\0')
    {
        scia_xmit(msg[i]);
        i++;
    }
}

void spi_init()
{
//SpibRegs.SPICCR.all =0x000F;                 // Reset on, rising edge, 16-bit char bits
   SpibRegs.SPICCR.all =0x0007;                 // Reset on, SPI mode 0 rising edge, 8-bit char bits
   SpibRegs.SPICTL.all =0x0006;                 // 0110 Enable master mode, normal phase,
   //SpibRegs.SPICTL.all =0x000E;               //Enable master mode, delayed phase,
   //SpibRegs.SPISTS.all=0x0000;
                                                 // enable talk, and SPI int disabled.
   SpibRegs.SPIBRR =0x0063;                     // SPI Baud rate

   // SpibRegs.SPICCR.all =0x0097;                 // Relinquish SPI from Reset with Loopback ON
    SpibRegs.SPICCR.all =0x0087;                 // Relinquish SPI from Reset with Loopback OFF
   // SpibRegs.SPIPRI.bit.TRIWIRE = 0;             // SPI 4-wire mode
    SpibRegs.SPIPRI.bit.FREE = 1;                // Set so breakpoints don't disturb xmission

}

void spi_xmit(Uint16 a)
{
    SpibRegs.SPITXBUF=a;
}

void spi_fifo_init()
{
// Initialize SPI FIFO registers - original code
    SpibRegs.SPIFFTX.all=0xE040; // 1110 0000 0100 0000
    SpibRegs.SPIFFRX.all=0x2044; // 0010 0000 0100 0100
}
/*
Uint8 SPI_SendByte(Uint8 spi_tx_data)
{
    Uint8 spi_rx_data;
    spi_rx_data = 0;
   spi_xmit(spi_tx_data);
    // Wait until data is received
    while(SpibRegs.SPIFFRX.bit.RXFFST !=1) { }
    // Check against sent data
    spi_rx_data = SpibRegs.SPIRXBUF;
    spi_rx_data = spi_rx_data >> 8;
    return (spi_rx_data);
}

*/
Uint8 SPI_SendByte(Uint8 spi_tx_data)
{
SpibRegs.SPITXBUF = spi_tx_data;                    //Transmit Byte
   while(SpibRegs.SPISTS.bit.INT_FLAG != 1);    //Wait until the RXBUF has received last bit
return (SpibRegs.SPIRXBUF << 8);           //Read Byte from RXBUF and return
}

My InitSpibGpio function looks like:

void InitSpibGpio()
{

   EALLOW;
/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.

    GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;   // Enable pull-up on GPIO12 (SPISIMOB)
   GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;   // Enable pull-up on GPIO13 (SPISOMIB)
    GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;   // Enable pull-up on GPIO14 (SPICLKB)
    GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;   // Enable pull-up on GPIO15 (SPISTEB)

//   GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;   // Enable pull-up on GPIO24 (SPISIMOB)
//   GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0;   // Enable pull-up on GPIO25 (SPISOMIB)
// GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0;   // Enable pull-up on GPIO26 (SPICLKB)
// GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0;   // Enable pull-up on GPIO27 (SPISTEB)

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.

    GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // Asynch input GPIO12 (SPISIMOB)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch input GPIO13 (SPISOMIB)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // Asynch input GPIO14 (SPICLKB)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // Asynch input GPIO15 (SPISTEB)

//   GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 3; // Asynch input GPIO24 (SPISIMOB)
// GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3; // Asynch input GPIO25 (SPISOMIB)
// GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 3; // Asynch input GPIO26 (SPICLKB)
// GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3; // Asynch input GPIO27 (SPISTEB)

/* Configure SPI-B pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.

    GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3; // Configure GPIO12 as SPISIMOB
    GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3; // Configure GPIO13 as SPISOMIB
    GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3; // Configure GPIO14 as SPICLKB
    GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3; // Configure GPIO15 as SPISTEB

// GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 3; // Configure GPIO24 as SPISIMOB
// GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 3; // Configure GPIO25 as SPISOMIB
// GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 3; // Configure GPIO26 as SPICLKB
// GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 3; // Configure GPIO27 as SPISTEB

    EDIS;
}