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Multi-slave SPI

Hi, I have a couple questions about SPI on the C2000.

I would like to setup a master to multi-slave SPI bus, where an F28069 is the master, and there are three slave devices (MCP2515s, which are SPI-CAN converters). Along with SPIA-SIMO, SPIA-SOMI and SPIA-CLK, will I also need the SPIA-STE pin, along with three more GPIOs to be used as the chip-selects? I am confused about how the STE pin is used, and how it is used in a multi-slave setup (in a single-slave setup, it appears to operate like a chip-select).

Also, I am planning to use a 20MHz crystal between X1 and X2 for a more accurate clock (my google research has indicated that the internal crystal oscillator in the F28069 may not be quite accurate enough for CAN communications, since the slaves are SPI-CAN converter devices). I plan on using XCLKOUT to drive the oscillator inputs on the MCP2515 slaves. Does this sound like a sound plan?

Thanks.

  • Ken,

    1) SPISTE - as you mention, SPISTE is used as a chip-select and is most useful in a point-to-point setup.  In many applications, I've seen customers use several individual GPIOs as individual chip selects for each slave.

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    2) Clocking - it is often true that the device's oscillator is not good enough for CAN communications by default. However, since you appear to be using SPI-CAN converters (not the CAN module itself) I would think that this would reduce the oscillator's accuracy requirements.   To be sure of this you'd need to look at the SPI specifications for the SPI-CAN converter.

    Note that there are other ways of increasing the internal oscillator's accuracy and precision.  It assumes you have some spare cycles that can be spent on calibration.  In many systems this improves the oscillator to be good enough for CAN's specifications.  If interested, see the following appnote (sprabi7 and its accompanying software):
    http://www.ti.com/mcu/docs/litabsmultiplefilelist.tsp?sectionId=96&tabId=1502&literatureNumber=sprabi7a&docCategoryId=1&familyId=919

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    Thank you,
    Brett

  • Thanks Brett.

    If I choose to use individual GPIOs for each slave chip select (three in total), then does that mean that I leave SPIA-STE unconnected?  Or is it connected with some logic to the three GPIOs (for example, in an AND configuration: CS1 = (GPIO1 AND STE), SC2 = (GPIO2 AND STE), etc..)?

    Thanks for the info on the clock. I will put in the pads and traces for an external crystal, and experiment with and without it.

    Cheers.

  • Ken,

    The SPISTE output will go low a partial SPI clock cycle before the SPICLK starts and go high a partial SPI clock cycles after the SPICLK stops.  This is its definition.  It has no idea what you are actually doing with chip selects (this assumes that you've set the SPI up as a SPI master).

    You can use three GPIOs and tie one GPIO output to each SPI slave.  You would then need to manage these GPIO pins yourself via software to enable the proper slave when its packet is sent.  If there are any timing requirements between when chip-select goes low and when clocks arrive (occasionally a concern) these will also need to be handled manually via software.

    Finally, if you aren't using SPISTE, you can always edit the GPIOMUX so that SPISTE doesn't get output.  This will allow for more efficient usage of your GPIOs.


    Thank you,
    Brett

  • Got it. So, STE is an automatic chip-select for a single-slave configuration only. When there are multiple slaves however, STE is ignored outside of the MCU, and the chip-selects are handled manually by user code on seperate GPIOs.

    Thanks for your help!

  • Hello Ken /Brett,

    I have similar problem with my hardware, I don't have the predfined SPISTE pin. I am using using one of the GPIO pins to act has the SPISTE pin.
    Could you please provide me the reference or documents which I could refer for making the GPIO pin to act as the SPISTE pin.

    Here is the threat which expalins scnerio fully (e2e.ti.com/.../1902010

    It would be really grateful, if you could help me with this.


    Best regards,
    Chetan