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Hi
I'm trying to implement a single phase mcbsp communication between to c2000 28355 processors.
i've configured the Tx/Rx registers to be single phase with a frame length of 8 word, each word is 16 bit.
I expected to see the frame synce bit active only at the start of each frame (meaning every 16*8=128 clk cycles), instead i got a frame sync bit before each word separately (every 16 clk cycles).
i found some ti papers on the mcbsp module with the conceptual signal diagram that i would like to get:
No matters what i tried i couldn't manage to get the frame sync only at the start of each frame.
i keep getting this wave shapes:
is it possible at all getting t McBSP working that way?
could someone please help me?