ramfunc code size issue while running stand alone mode

Other Parts Discussed in Thread: CONTROLSUITE

I am using the Piccolo F28069 and trying to do the usual loading of code to RAM using ramfunc. I ran into an issue when trying to run without the emulator (stand alone mode).

Everything works fine until the code size in RAM exceeds a certain limit, in this case it is 0x03d8. Then it would not run in stand alone mode (still can run with an emulator though). I tried to comment out a few lines of code that are supposed to be in RAM and it was back to working again (stand alone). I've looked at the map file and nothing looked out of the ordinary. All the intended functions are located in RAM as they are supposed to, and there is still plenty of memory available after all the ramfunc code. I've never seen this before and wonder if anyone has a clue. Probably something simple that I overlooked.

Thanks,

Erik

over 12 years ago

0 Igor Gorbachev over 12 years ago

Guru 20525 points

Hi Erik!

Erik Dinh said:

I am using the Piccolo F28069 and trying to do the usual loading of code to RAM using ramfunc. I ran into an issue when trying to run without the emulator (stand alone mode).

At first. Do you mean that you don't use loading to flash (only to RAM)? In fact at this case the firmware will not start in standalone mode of DSP.

Regards,

Igor

0 ED over 12 years ago in reply to Igor Gorbachev

Intellectual 475 points

Hi Igor,

I used the FLASH cmd file if that was what you meant. If you read further you'd see that my code runs standalone until I exceed about 1k of code in RAM.

This is one line of code in the map file that shows the status of the RAM code

origin length used unused

PRAML0 00008000 00000800 000003c9 00000437 RWIX <- not working standalone

When I comment out one line of code that is supposed to be in RAM this looks like

PRAML0 00008000 00000800 000003b8 00000448 RWIX <- back to working standalone

(Notice the difference in "used" memory).

Any idea would be appreciated.

Erik

0 Igor Gorbachev over 12 years ago in reply to ED

Guru 20525 points

Hi Erik!

Erik Dinh said:

When I comment out one line of code that is supposed to be in RAM this looks like

PRAML0 00008000 00000800 000003b8 00000448 RWIX <- back to working standalone

Does it refer to a some particular line or to any one line?

Also I would recommend you the following:

5773.TI_Running_from_Flash_spra958l.pdf

3808.TI_Copying Compiler Sections From Flash to RAM.pdf

http://processors.wiki.ti.com/index.php/C28x_Compiler_-_Understanding_Linking

Regards,

Igor

0 Zachary Wong over 12 years ago

Prodigy 180 points

Erik,

I once faced a similar issue upon flashing,which was that i was able to flash my program to DSP successfully until my code size of program was too large to fit into internal ram , the solution was to move those unfit-able sections to external RAM, although I am not sure if you are facing same issues, just for your reference.

Regards,

Zachary

0 ED over 12 years ago in reply to Zachary Wong

Intellectual 475 points

Igor,

No, it doesn't matter what line of RAM code I comment out, as long as it brings the "used" memory down a bit, and it is back to working stand alone. This is very strange to me.

Zachary,

I have no problem with space. If you look at the line on my map file above, you'll see that I still have "unused" space left.

Btw, I am using the F28069 Control Card.

Again, any help would be appreciated.

Erik

0 Igor Gorbachev over 12 years ago in reply to ED

Guru 20525 points

Hi Erik!

Could you please upload your CMD file at first (or better project.zip)? BTW did you go through my above references?

Regards,

Igor

0 ED over 12 years ago in reply to Igor Gorbachev

Intellectual 475 points

Here is the CMD file. And yes I am familiar with the documents you referenced.

F28069_FLASH.txt

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/*
//###########################################################################
//
// FILE:    F28069_FLASH.CMD
//
// TITLE:   Linker Command File For F28069 Device Flash API
//
//###########################################################################
// $TI Release: F2806x Flash API Release V1.00 $
// $Release Date: March 31, 2011 $
//###########################################################################
*/
/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For nonBIOS applications add:   F2806x_Headers_nonBIOS.cmd
========================================================= */
/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections
    Notes:
          Memory blocks on F2806x are uniform (ie same
          physical memory) in both PAGE 0 and PAGE 1.
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
          Doing so will result in corruption of program
          and/or data.
          Contiguous SARAM memory blocks can be combined
          if required to create a larger memory block.
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

/*
//###########################################################################
//
// FILE:	F28069_FLASH.CMD
//
// TITLE:	Linker Command File For F28069 Device Flash API
//
//###########################################################################
// $TI Release: F2806x Flash API Release V1.00 $
// $Release Date: March 31, 2011 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For nonBIOS applications add:   F2806x_Headers_nonBIOS.cmd
========================================================= */


/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

    Notes:
          Memory blocks on F2806x are uniform (ie same
          physical memory) in both PAGE 0 and PAGE 1.
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
          Doing so will result in corruption of program
          and/or data.


          Contiguous SARAM memory blocks can be combined
          if required to create a larger memory block.
 */


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   PRAML0      : origin = 0x008000, length = 0x000800     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHH      : origin = 0x3D8000, length = 0x004000     /* on-chip FLASH */
   FLASHG      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
   FLASHF      : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
   FLASHE      : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */   
   FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHC      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL_PROG: origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

   FPUTABLES   : origin = 0x3FD860, length = 0x0006A0	  /* FPU Tables in Boot ROM */
   IQTABLES    : origin = 0x3FDF00, length = 0x000B50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEA50, length = 0x00008C     /* IQ Math Tables in Boot ROM */
   IQTABLES3   : origin = 0x3FEADC, length = 0x0000AA	  /* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF3B0, length = 0x000C10     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   DRAMM0      : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   DRAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */

   DRAML1      : origin = 0x008800, length = 0x000400     /* on-chip RAM block L1 */

   DRAML2      : origin = 0x008C00, length = 0x000400     /* on-chip RAM block L2 */
   DRAML4      : origin = 0x00A000, length = 0x002000     /* on-chip RAM block L4 */
   DRAML5      : origin = 0x00C000, length = 0x002000     /* on-chip RAM block L5 */
   DRAML6      : origin = 0x00E000, length = 0x002000     /* on-chip RAM block L6 */
   DRAML7      : origin = 0x010000, length = 0x002000     /* on-chip RAM block L7 */
   DRAML8      : origin = 0x012000, length = 0x002000     /* on-chip RAM block L8 */

   FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

   /* Allocate program areas: */
   /* The Flash API functions can be grouped together as shown below.
      The defined symbols _Flash28_API_LoadStart, _Flash28_API_LoadEnd
      and _Flash28_API_RunStart are used to copy the API functions out
      of flash memory and into SARAM */

/******************************************************************/
/* For Piccolo we dont need to copy the API from Flash as it is */
/* present in BOOT ROM											  */
/******************************************************************/
/*   Flash28_API: // Applicable only when API is not in BootROM
   {
        -lFlash2802x_API_V100a.lib(.text)
   }                   LOAD = FLASHD,
                       RUN = PRAML0,
                       LOAD_START(_Flash28_API_LoadStart),
                       LOAD_END(_Flash28_API_LoadEnd),
                       RUN_START(_Flash28_API_RunStart),
                       PAGE = 0
*/
   .cinit              : > FLASHA       PAGE = 0
   .pinit              : > FLASHA,      PAGE = 0
   .text               : > FLASHA       PAGE = 0
   codestart           : > BEGIN        PAGE = 0
   ramfuncs            : LOAD = FLASHA,
                         RUN = PRAML0,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL_PROG PAGE = 0
   csm_rsvd            : > CSM_RSVD     PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack              : > DRAMM0       PAGE = 1
   .ebss               : > DRAML4       PAGE = 1
   .esysmem            : > DRAML4       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA       PAGE = 0
   .switch             : > FLASHA       PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASHA       PAGE = 0            /* Math Code */
   IQmathTables        : > IQTABLES,    PAGE = 0, TYPE = NOLOAD
   /* Allocate FPU math areas: */
   FPUmathTables       : > FPUTABLES,  PAGE = 0, TYPE = NOLOAD

   /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
   /* Uncomment the section below if calling the IQNasin() or IQasin()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

   }
   */

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 ED over 12 years ago in reply to Igor Gorbachev

Intellectual 475 points

Here is the CMD file. And yes I am familiar with the documents you referenced.

F28069_FLASH.txt

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/*
//###########################################################################
//
// FILE:    F28069_FLASH.CMD
//
// TITLE:   Linker Command File For F28069 Device Flash API
//
//###########################################################################
// $TI Release: F2806x Flash API Release V1.00 $
// $Release Date: March 31, 2011 $
//###########################################################################
*/
/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For nonBIOS applications add:   F2806x_Headers_nonBIOS.cmd
========================================================= */
/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections
    Notes:
          Memory blocks on F2806x are uniform (ie same
          physical memory) in both PAGE 0 and PAGE 1.
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
          Doing so will result in corruption of program
          and/or data.
          Contiguous SARAM memory blocks can be combined
          if required to create a larger memory block.
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

/*
//###########################################################################
//
// FILE:	F28069_FLASH.CMD
//
// TITLE:	Linker Command File For F28069 Device Flash API
//
//###########################################################################
// $TI Release: F2806x Flash API Release V1.00 $
// $Release Date: March 31, 2011 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For nonBIOS applications add:   F2806x_Headers_nonBIOS.cmd
========================================================= */


/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

    Notes:
          Memory blocks on F2806x are uniform (ie same
          physical memory) in both PAGE 0 and PAGE 1.
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
          Doing so will result in corruption of program
          and/or data.


          Contiguous SARAM memory blocks can be combined
          if required to create a larger memory block.
 */


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   PRAML0      : origin = 0x008000, length = 0x000800     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHH      : origin = 0x3D8000, length = 0x004000     /* on-chip FLASH */
   FLASHG      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
   FLASHF      : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
   FLASHE      : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */   
   FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHC      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL_PROG: origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

   FPUTABLES   : origin = 0x3FD860, length = 0x0006A0	  /* FPU Tables in Boot ROM */
   IQTABLES    : origin = 0x3FDF00, length = 0x000B50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEA50, length = 0x00008C     /* IQ Math Tables in Boot ROM */
   IQTABLES3   : origin = 0x3FEADC, length = 0x0000AA	  /* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF3B0, length = 0x000C10     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   DRAMM0      : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   DRAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */

   DRAML1      : origin = 0x008800, length = 0x000400     /* on-chip RAM block L1 */

   DRAML2      : origin = 0x008C00, length = 0x000400     /* on-chip RAM block L2 */
   DRAML4      : origin = 0x00A000, length = 0x002000     /* on-chip RAM block L4 */
   DRAML5      : origin = 0x00C000, length = 0x002000     /* on-chip RAM block L5 */
   DRAML6      : origin = 0x00E000, length = 0x002000     /* on-chip RAM block L6 */
   DRAML7      : origin = 0x010000, length = 0x002000     /* on-chip RAM block L7 */
   DRAML8      : origin = 0x012000, length = 0x002000     /* on-chip RAM block L8 */

   FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

   /* Allocate program areas: */
   /* The Flash API functions can be grouped together as shown below.
      The defined symbols _Flash28_API_LoadStart, _Flash28_API_LoadEnd
      and _Flash28_API_RunStart are used to copy the API functions out
      of flash memory and into SARAM */

/******************************************************************/
/* For Piccolo we dont need to copy the API from Flash as it is */
/* present in BOOT ROM											  */
/******************************************************************/
/*   Flash28_API: // Applicable only when API is not in BootROM
   {
        -lFlash2802x_API_V100a.lib(.text)
   }                   LOAD = FLASHD,
                       RUN = PRAML0,
                       LOAD_START(_Flash28_API_LoadStart),
                       LOAD_END(_Flash28_API_LoadEnd),
                       RUN_START(_Flash28_API_RunStart),
                       PAGE = 0
*/
   .cinit              : > FLASHA       PAGE = 0
   .pinit              : > FLASHA,      PAGE = 0
   .text               : > FLASHA       PAGE = 0
   codestart           : > BEGIN        PAGE = 0
   ramfuncs            : LOAD = FLASHA,
                         RUN = PRAML0,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL_PROG PAGE = 0
   csm_rsvd            : > CSM_RSVD     PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack              : > DRAMM0       PAGE = 1
   .ebss               : > DRAML4       PAGE = 1
   .esysmem            : > DRAML4       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA       PAGE = 0
   .switch             : > FLASHA       PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASHA       PAGE = 0            /* Math Code */
   IQmathTables        : > IQTABLES,    PAGE = 0, TYPE = NOLOAD
   /* Allocate FPU math areas: */
   FPUmathTables       : > FPUTABLES,  PAGE = 0, TYPE = NOLOAD

   /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
   /* Uncomment the section below if calling the IQNasin() or IQasin()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

   }
   */

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 Igor Gorbachev over 12 years ago in reply to ED

Guru 20525 points

Thanks Erik. I will look...

Regards,

Igor

0 Igor Gorbachev over 12 years ago in reply to Igor Gorbachev

Guru 20525 points

Hi Erik!

At first try this

3348.F28069_FLASH_0.txt

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/*
//###########################################################################
//
// FILE:    F28069_FLASH.CMD
//
// TITLE:   Linker Command File For F28069 Device Flash API
//
//###########################################################################
// $TI Release: F2806x Flash API Release V1.00 $
// $Release Date: March 31, 2011 $
//###########################################################################
*/
/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

/*
//###########################################################################
//
// FILE:	F28069_FLASH.CMD
//
// TITLE:	Linker Command File For F28069 Device Flash API
//
//###########################################################################
// $TI Release: F2806x Flash API Release V1.00 $
// $Release Date: March 31, 2011 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For nonBIOS applications add:   F2806x_Headers_nonBIOS.cmd
========================================================= */


/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

    Notes:
          Memory blocks on F2806x are uniform (ie same
          physical memory) in both PAGE 0 and PAGE 1.
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
          Doing so will result in corruption of program
          and/or data.


          Contiguous SARAM memory blocks can be combined
          if required to create a larger memory block.
 */


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   PRAML0      : origin = 0x008000, length = 0x000800     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHH      : origin = 0x3D8000, length = 0x004000     /* on-chip FLASH */
   FLASHG      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
   FLASHF      : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
   FLASHE      : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */   
   FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHC      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL_PROG: origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

   FPUTABLES   : origin = 0x3FD860, length = 0x0006A0	  /* FPU Tables in Boot ROM */
   IQTABLES    : origin = 0x3FDF00, length = 0x000B50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEA50, length = 0x00008C     /* IQ Math Tables in Boot ROM */
   IQTABLES3   : origin = 0x3FEADC, length = 0x0000AA	  /* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF3B0, length = 0x000C10     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   DRAMM0      : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   DRAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */

   DRAML1      : origin = 0x008800, length = 0x000400     /* on-chip RAM block L1 */

   DRAML2      : origin = 0x008C00, length = 0x000400     /* on-chip RAM block L2 */
   DRAML4      : origin = 0x00A000, length = 0x002000     /* on-chip RAM block L4 */
   DRAML5      : origin = 0x00C000, length = 0x002000     /* on-chip RAM block L5 */
   DRAML6      : origin = 0x00E000, length = 0x002000     /* on-chip RAM block L6 */
   DRAML7      : origin = 0x010000, length = 0x002000     /* on-chip RAM block L7 */
   DRAML8      : origin = 0x012000, length = 0x002000     /* on-chip RAM block L8 */

   FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

   /* Allocate program areas: */
   /* The Flash API functions can be grouped together as shown below.
      The defined symbols _Flash28_API_LoadStart, _Flash28_API_LoadEnd
      and _Flash28_API_RunStart are used to copy the API functions out
      of flash memory and into SARAM */

/******************************************************************/
/* For Piccolo we dont need to copy the API from Flash as it is */
/* present in BOOT ROM											  */
/******************************************************************/
/*   Flash28_API: // Applicable only when API is not in BootROM
   {
        -lFlash2802x_API_V100a.lib(.text)
   }                   LOAD = FLASHD,
                       RUN = PRAML0,
                       LOAD_START(_Flash28_API_LoadStart),
                       LOAD_END(_Flash28_API_LoadEnd),
                       RUN_START(_Flash28_API_RunStart),
                       PAGE = 0
*/
   .cinit              : > FLASHA       PAGE = 0
   .pinit              : > FLASHA,      PAGE = 0
   .text               : > FLASHC       PAGE = 0
   codestart           : > BEGIN        PAGE = 0
   ramfuncs            : LOAD = FLASHD,
                         RUN = PRAML0,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL_PROG PAGE = 0
   csm_rsvd            : > CSM_RSVD     PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack              : > DRAMM0       PAGE = 1
   .ebss               : > DRAML4       PAGE = 1
   .esysmem            : > DRAML4       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA       PAGE = 0
   .switch             : > FLASHA       PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASHA       PAGE = 0            /* Math Code */
   IQmathTables        : > IQTABLES,    PAGE = 0, TYPE = NOLOAD
   /* Allocate FPU math areas: */
   FPUmathTables       : > FPUTABLES,  PAGE = 0, TYPE = NOLOAD

   /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
   /* Uncomment the section below if calling the IQNasin() or IQasin()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

   }
   */

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Regards,

Igor

0 ED over 12 years ago in reply to Igor Gorbachev

Intellectual 475 points

Thanks Igor, but it is not working. I think I had already tried this.

0 Igor Gorbachev over 12 years ago in reply to ED

Guru 20525 points

Hi Erik!

Honestly I didn't find something wrong in your CMD so far. Just I have tried to go empiric way. What kind of emulator do you apply?

Regards,

Igor

0 ED over 12 years ago in reply to Igor Gorbachev

Intellectual 475 points

I use CCS 5.4. I've tried on 2 different control cards and they both showed the same symptom. I've also tried different RAM blocks but it didn't help either. Just a reminder I can run code with the emulator. Only when I try running on its own then I'd have this issue.

For now as a temporary fix I am running most code from FLASH, but I'd like to find the solution so I can get back some processing time (by running some code in RAM).

Thanks again,

0 Igor Gorbachev over 12 years ago in reply to ED

Guru 20525 points

Well...Just in case I would try to test this issue. One might take some simple example (for example Blinky from controlSUITE) and define array:

#pragma DATA_SECTION( array,"section name")

Uint16 array[N];

One might try N up to 2048 (0x800) and check when the project will behave like your project (if of course it's going to happen ...). Maybe the some problem with the code is somehow linked to its size in memory...Of course it sounds absurd.

Regards,

Igor

0 Igor Gorbachev over 12 years ago in reply to ED

Guru 20525 points

Hi Erik!

There are a couple of suggestions also.

1 Reinstalling CCSv5.4

2 To try CCSv5.2

Regards,

Igor

0 ED over 12 years ago in reply to Igor Gorbachev

Intellectual 475 points

Hi Igor,

Your first suggestion: I am not sure about creating the data array because I have problem with the program space, not data space. However, I can create some fake code to put in RAM instead and see how it goes.

About the second suggestion: I am a bit confused about your wording. Can you clarify that I need to "Uninstall 5.4" and install 5.2? If so, are you sure 5.2 will resolve it? It is a major undertaking with high risk of messing up other things and I don't feel like I have time to experiment with this if the outcome is not certain.

Thanks,

Erik

0 Igor Gorbachev over 12 years ago in reply to ED

Guru 20525 points

Hi Erik!

1) Yes, I understand that there is issue of program memory (not data memory), but I would try anyway. In my opinion this will help to locate the reason issue.

2) I mean to uninstall CCSv5.4 and install it again. If this step will not help then to try to go on CCSv5.2. (If you pay attention on threads of CCS forum you will see that some problems with v5.4 occur sometimes).

Regards,

Igor

0 ED over 12 years ago in reply to Igor Gorbachev

Intellectual 475 points

Just an update,

After having tried various paths to fix the issue, I took a look at the actual MemCopy function (given by one of the examples in controlSuite) and replaced it with the memcpy function. It works! I don't have time at the moment to find out the reason but the bottom line is:

Do not use this!

void Example_MemCopy(Uint16 *SourceAddr, Uint16* SourceEndAddr, Uint16* DestAddr)

{

while(SourceAddr < SourceEndAddr)

{

*DestAddr++ = *SourceAddr++;

}

return;

}

Use this

memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

Thanks for all the feedback;

Erik

C2000™︎ microcontrollers

C2000 microcontrollers forum

ramfunc code size issue while running stand alone mode