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CCS/TMS320F28388D: How to debug one core without stopping other cores while running in flash stand-alone mode?

Steve Lim
Intellectual 2805 points
Part Number: TMS320F28388D

Tool/software: Code Composer Studio

Hi Champs,

While all cores are running in stand-alone flash mode, Is it possible to debug a one core by connecting CCS without stopping the operation of other cores.

I tried to connect CPU2 in debug mode, but unfortunately the gel file for CPU1 did work and all cores were stopped.  Is there any tips for this case?

Thank,

Steve

  • 0
    TI__Mastermind 27961 points

    Steve,

    Have you taken a look at real-time emulation mode in CCS? I'm not sure what CCS version you are using, but here is a description of that mode for CCS v10.1.0.

    https://software-dl.ti.com/ccs/esd/documents/users_guide/ccs_debug-main.html

  • 0 in reply to Gus Martinez
    TI__Intellectual 2805 points

    Gus,

    Thank you for your comment.

    I'm using CCS 10.0. I made it with the guidance you posted the link.

    I was able to reprogram and debug CPU2 without interrupting other coders(CPU1 and CM) while running on flash stand-alone mode. Here is the debug process I've done. Please let me know if you have a simpler way.

    1) Uncheck the box of "Halt the target on a connect" in Debug properties

    2)      Launch the debug manually     

    3)      Select CPU1. Enable silicon realtime mode and Disable polite realtime mode 

    3)      Select CPU2. Enable silicon realtime mode, Disable polite realtime mode

    4)      CPU2 Target Connection

    5)      Select CPU2. Disable both silicon realtime mode and polite realtime mode

    6)      CPU2 reset 

    7)      CPU2 program load

    8)      CPU2 Enable silicon realtime mode

    9)      Run

    Thanks,

    Steve

  • 0 in reply to Steve Lim
    TI__Guru** 113745 points

    Hi Steve,

    Please note that when you try to program CPU2 via flash plug-in (used for loading code in flash), the FLASH API get loaded into GSx  RAM (shared between CPU1 and CPU2). Which means if CPU1 is using those RAMs then it could impact CPU1 execution.

    Regards,

    Vivek Singh