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F28377D and CLA program space

Andrea Zanni
Prodigy 30 points

Hello, i'm developing an application which uses CLA to perform a Converter control.

The CPU being used is the F28377D Delfino dual core.

I'm writing code onto flash and at runtime it gets loaded on RAM.

The code has a size of 0xA46 but a single LS memory is 0x800.

This is the actual configuration used for running the code:

Cla1Prog : LOAD = FLASHJ,
RUN = RAMLS1,
LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
RUN_START(_Cla1funcsRunStart),
LOAD_SIZE(_Cla1funcsLoadSize),
PAGE = 0, ALIGN(4)

Obviously i get the error because RAMLS1 is only 0x800 and i'm trying to load 0xA46 on this memory.

Is there any way to force the usage of two LS for program memory?

Something like "RUN = RAMLS1 | RAMLS2,"?

I also forced the RAMLS1 size to 0xB00 and reduced LS2 to 0x500 but the code(obviously?) stops at 0x800 size at runtime.

Ask if any other information is need.

Thanks

Fabrizio

  • 0
    TI__Guru 57255 points

    Hi Fabrizio,

    Please take a look at the following wiki page:
    http://processors.wiki.ti.com/index.php/C28x_Compiler_-_Understanding_Linking

    I have not personally attempted to use the split functionality for memory that will be moved from FLASH to RAM (load/run code).  However, I expect it should work (however, you may have to rename some section).  I have used this split functionality in other ways.

    I would also recommend taking a look at the CLA's memory configuration and make sure that you have assigned proper ownership, of any memory that you hope to use with the CLA, to the CLA.  Search for MemCfgRegs in the CLA portion of this device's TRM.


    Thank you,
    Brett

  • 0 in reply to Brett Larimore
    Prodigy 30 points
    Thank you for the fast reply, the ownership should be already correct:
    //--- Memory Configuration - Master CPU and CLA Select
    MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 1; // 0=CPU 1=CPU and CLA
    MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 1; // 0=CPU 1=CPU and CLA
    MemCfgRegs.LSxMSEL.bit.MSEL_LS2 = 1; // 0=CPU 1=CPU and CLA
    MemCfgRegs.LSxMSEL.bit.MSEL_LS3 = 0; // 0=CPU 1=CPU and CLA
    MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1; // 0=CPU 1=CPU and CLA
    MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 0; // 0=CPU 1=CPU and CLA

    //--- Memory Configuration - CLA Data Memory and CLA Program Memory Select
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 0; // 0=CLA data memory 1=CLA program memory
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 1; // 0=CLA data memory 1=CLA program memory
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS2 = 1; // 0=CLA data memory 1=CLA program memory
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS3 = 0; // 0=CLA data memory 1=CLA program memory
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 0; // 0=CLA data memory 1=CLA program memory
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 0; // 0=CLA data memory 1=CLA program memory

    Actually the split function doesn't seem to work at all on the Cla1Prog since i'm also using directly this:
    Cla1Prog : >> RAMLS1 | RAMLS2, PAGE = 0, ALIGN(4)

    And i get the same error:
    program will not fit into available memory. placement with alignment/blocking fails for section "Cla1Prog" size 0xacb page 0.

    As for the FLASH to RAM move, the linker should be something like this:
    Cla1Prog : LOAD = FLASHJ,
    RUN = RAMLS1 | RAMLS2,
    LOAD_START(_Cla1funcsLoadStart),
    LOAD_END(_Cla1funcsLoadEnd),
    RUN_START(_Cla1funcsRunStart),
    LOAD_SIZE(_Cla1funcsLoadSize),
    PAGE = 0, ALIGN(4)
    ? Because in this case where should i put the "split" operand (>>)?
    Thank you again
  • 0 in reply to Andrea Zanni
    TI__Guru 57255 points

    Hi,

    What happens if, in the cmd file, you remove RAMLS1 and RAMLS2 and specify a new block RAMLS1_2 (starting at RAMLS1's origin and being of size 0x1000)?

    And then use this specifier in the Load/Run region of the cmd.

    (the wiki page I linked above talks about this option as well)


    Thank you,
    Brett

  • 0 in reply to Brett Larimore
    Prodigy 30 points
    That was it! The closest try i did was to expans LS1 just enough to fit the code but it didn't work, but the way you told worked! Thank you so much!