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Hello,
I am looking for to put Flash Drivers in GSxRAM (by CPU1) and to branch CPU2 to those Driver APIs. So can you send me some flowchart or Algorithm for that? Where Will I get all the detail information regarding IPC Commands?
Thanks,
Pratap
Pratap,
Checkout this application report: http://www.ti.com/lit/an/sprabv4a/sprabv4a.pdf.
This gives you an example on how you can download a Flash kernel (which can receive the data from a boot loader and program Flash using API) in to the device RAM. You can try the example projects provided in Controlsuite:
1) Serial Flash kernel (example code that receives the data from SCI and programs Flash) example that can be loaded in to device RAM via SCI Bootloader are provided at C:\ti\controlSUITE\device_support\F2837xD\vx\F2837xD_examples_Dual\F2837xD_sci_flash_kernels.
2) Host PC application that communicates with the SCI bootloader to download the Flash kernels and the Flash application is provided at C:\ti\controlSUITE\device_support\~Utilities\serial_flash_programmer.
You can use this as an example and develop your own kernel to match your application needs. In your case, you can download the CPU2 Flash kernel to sharedRAM and then use a C1TOC2IPC command so that C2-BootROM can jump to the address in shared RAM to execute the CPU2 Flash kernel. You can find the details of the C1TOC2IPC commands that are decoded by CPU2 Boot ROM in section 3.18.3.1 in TRM at http://www.ti.com/lit/ug/spruhm8e/spruhm8e.pdf.
Thanks and regards,
Vamsi
Vamsi,
You people don't have any application note other than that SCI boot loader? I have gone through that app note. That can not help for actual implementation. If possible, please send me IPC commands related explanation.
Thanks,
Pratap Chape
Pratap,
The serial flash programmer app note that I referred describes how you can use a boot loader (you can apply it to other boot loaders if you want) to load the Flash kernel (code provided) in to the device RAM and explains what the Flash kernels do to update the Flash. Once you go through the app note that I cited, please go through the examples that I mentioned and that can help you for your implementation. What other algorithms are you looking for? Please clarify. Do you need details on Flash API?
Regarding the IPC commands: Did you look at the chapter that I cited in TRM for C1ToC2IPC commands? Section 3.18.3.1 in TRM explains the IPC commands supported by the BootROM. Can you explain on what exactly you want to accomplish using IPC? I thought you need an IPC command to tell CPU2 to branch to a particular address in shared RAM and hence asked you to look at that TRM section.
Thanks and regards,
Vamsi
Pratap,
I am closing this thread for now.
You can reopen it if you have questions on this topic.
Thanks and regards,
Vamsi