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I have set up the comparators in a way that when low over current occurs it will give me an interrupt which I handle. If there is a bigger overcurrent PWMs will be disabled and again interrupt occurs. The problem is that how can I configure the interrupts and everything so that I get only one interrupt in one PWM period? I tried to clear the TZ flags with PWM interrupt when PWM counter is period but I also have a ADC interrupt at the middle of the period. Those two interrupts takes too much time in a one PWM period that MCU can't handle it. Of course I can always clear TZ flags in ADC interrupt but isn't there a way to do it more properly? Is it possible to configure the blanking window so that it will blank the interrupts for the rest of the PWM period?
Is TZ pin edge sensitive? If it is then I could route my analog comparator output pin to TZ pin so I could get interrupts only after when comparator has put it's output low and then high again.
Hi JHi,
Did you find a solution for this problem - I am struggling over a similar issue. I use the comparator to sense a current and issue an interrupt when the current is bigger than the threshold, when the current is smaller again, another interrupt should be called. The problem is, that the interrupt is called over and over again as soon as the current value is bigger than the threshold, that drives me nuts. Any proposals would be greatly appreciated!
BR andreas
In your case you could use digital compare. First configure it trigger to when digital compare is high. When you then service your interrupt change the trigger to when the digital compare is low. Now you should only get one interrupt and when the current decreases under your threshold and you get another interrupt, change the trigger back to digital compare high. Do you think this could work?
JHi
Hi JHi
Thanks for the proposal, I do agree with you that this should be a useful solution, however for some reasons I am not able to implement it on the target.... Something in my configuration is wrong. This submodule is definitly not the one that has the best description..... I'll try again, if you or anybody else could give me hints, go on they are welcome :-)
BR Andreas
Example:
EPwm1Regs.TZDCSEL.bit.DCAEVT2 = 2; // DCAH = high, DCAL = don't care
EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = 8; Digital Compare A High Input Select, COMP1OUT input
EPwm1Regs.DCACTL.bit.EVT2FRCSYNCSEL = 1; // Source Is Asynchronous Signal
EPwm1Regs.TZEINT.bit.DCAEVT2 = 1; Digital Comparator Output A Event 2 Interrupt Enable
in first interrupt
EPwm1Regs.TZDCSEL.bit.DCAEVT2 = 1; // DCAH = low, DCAL = don't care
and back again second interrupt:
EPwm1Regs.TZDCSEL.bit.DCAEVT2 = 2; // DCAH = high, DCAL = don't care
I hope I have everything here :)
Edit: You will also have to enable the TZ interrupt :
PieCtrlRegs.PIEIER2.bit.INTx1 = 1; // Enable INT 2.1 in the PIE
Hi JHi
OK I'm there now - the config you proposed is correct. What you have to do in in addition in the TZ ISR, is to poll the status bit of the comparator and take the action according, see the example below. Thanks very much for the support!
BR Andreas
interrupt void EPWM3_TZINT_ISR(void) // EPwm3 Trip Zone
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG23; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
if(Comp1Regs.COMPSTS.bit.COMPSTS == 1)
{
EALLOW;
EPwm3Regs.TZDCSEL.bit.DCAEVT2 = 0x1;
GpioDataRegs.GPASET.bit.GPIO4 = 1;
}
else
{
EALLOW;
EPwm3Regs.TZDCSEL.bit.DCAEVT2 = 0x2;
GpioDataRegs.GPACLEAR.bit.GPIO4 = 1;
}
EPwm3Regs.TZCLR.bit.INT = 1;
EPwm3Regs.TZCLR.bit.DCAEVT2 = 1;
EDIS;
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
//asm (" ESTOP0");
//for(;;);
}
Hi JHi
OK I'm there now - the config you proposed is correct. What you have to do in in addition in the TZ ISR, is to poll the status bit of the comparator and take the action according, see the example below. Thanks very much for the support!
BR Andreas
interrupt void EPWM3_TZINT_ISR(void) // EPwm3 Trip Zone
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG23; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
if(Comp1Regs.COMPSTS.bit.COMPSTS == 1)
{
EALLOW;
EPwm3Regs.TZDCSEL.bit.DCAEVT2 = 0x1;
GpioDataRegs.GPASET.bit.GPIO4 = 1;
}
else
{
EALLOW;
EPwm3Regs.TZDCSEL.bit.DCAEVT2 = 0x2;
GpioDataRegs.GPACLEAR.bit.GPIO4 = 1;
}
EPwm3Regs.TZCLR.bit.INT = 1;
EPwm3Regs.TZCLR.bit.DCAEVT2 = 1;
EDIS;
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
//asm (" ESTOP0");
//for(;;);
}