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Hi all,
I'm trying to adapt F2806x_ECan.c found in common\source repository of ControlSuite to my board, but was confused reading the device tech ref guide.
The source code gives CANBTC configuration for 1 Mbps CAN with SYSCLKOUT = 80 MHz.
I would like to have same CAN bit rate with SYSCLKOUT = 90 MHz.
Par. 16.10.1 CAN Bit-Timing Configuration reports:
The following bit timing rules must be fulfilled when determining the bit segment values:
1) TSEG1(min) ≥ TSEG2
2) IPT ≤ TSEG1 ≤ 16 TQ
3) IPT ≤ TSEG2 ≤ 8 TQ
4) IPT = 3/BRP (the resulting IPT has to be rounded up to the next integer value)
5) 1 TQ ≤ SJW min[4 TQ, TSEG2] (SJW = Synchronization jump width)
6) To utilize three-time sampling mode, BRP ≥ 5 has to be selected
where IPT is two TQ.
Can someone explain 4) and 5) ? Probably there is some typo, 4) is inconsistent having a time on the left side and a number on the right side.
Thanks,
Vasco
Vasco,
The IPT is measured in time quanta (TQ). It puts a lower limit on the value of TSEG2.
A larger SJW improves the oscillator tolerance. The maximum allowed SJW is min(4, Tseg1, Tseg2).
We have a calculator for CAN bit timing parameters. The literature number is SPRAC35. Here's a link:
The calculator spreadsheet can be found at the link in the PDF.
