Piccolo F28069 - HRPWM - CMPAHR - 0xFF limit

Hello,

A good example to refer to for high resolution duty control can be found here:
controlSUITE\device_support\f2806x\v151\F2806x_examples_ccsv5\hrpwm_duty_sfo_v6
You can also review other HRPWM examples in controlSUITE and compare with your configuration.

If you haven't already, the SFO Library can be used to calculate an appropriate MEP scale factor. You can check the HRPWM chapter in the TRM for more information on the SFO calibration.

Elizabeth

-Bharathi

I followed the high resolution example from control suite "Example_2806xHRPWM"

and even on that code, if you make the variable "DutyFine = 255" the PWMS shut off.

As for my code, I'm finding out that enabling AUTOCONV stops the high resolution from working.
The CMPAHR is still being loaded but when AUTOCONV is on, it does not take effect on the duty cycle.

When I have it off, I can see the high resolution working but get those glitches when CMPAHR = 0x255.


Right now I'm not using the SFO calibration routine. It should work without it. right ?
Also, in the example program I dont see where the call the SFO(); function.

This is my config for PWM1
EPwm1Regs.TBPRD = period; // 220Khz
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero
EPwm1Regs.CMPA.half.CMPAHR = (1 << 8); // initialize HRPWM extension
EPwm1Regs.TBCTR = 0;

EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm1Regs.TBCTL.bit.PHSDIR = TB_SHADOW;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;


// Counter compare submodule registers
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_PRD;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPA.half.CMPA = 0;
EPwm1Regs.CMPB = 0;

// high resolution config
EPwm1Regs.HRCNFG.all = 0x0;
EPwm1Regs.HRCNFG.bit.EDGMODE = 3; //MEP control on Rising edge
EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP;
EPwm1Regs.HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
// EPwm1Regs.HRCNFG.bit.AUTOCONV = 1 ; // ENABLE AUTOCONVERSION
// EPwm1Regs.HRMSTEP = 83*256;

// Action Qualifier SubModule Registers
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm1Regs.AQCTLA.bit.PRD = AQ_CLEAR;

// DeadBand Control Register
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi Complimentary
EPwm1Regs.DBRED = 0; // Initial value
EPwm1Regs.DBFED = 0; // Initial value


EPwm1Regs.AQCTLA.bit.ZRO = 2;
EPwm1Regs.AQCTLA.bit.CAU = 1;
EPwm1Regs.AQCTLB.bit.ZRO = AQ_NO_ACTION; //
EPwm1Regs.AQCTLB.bit.CAU = AQ_NO_ACTION;
EPwm1Regs.AQCTLB.bit.PRD = AQ_NO_ACTION;


EDIS;