TMS320F28379D: Any rules for Synchronization of EPWM in F28379D ...? How can we synchronized EPWM for phase shift requirement.

Hello,

i am taking EPWM4 as master and EPWM5,EPWM6,EPWM7 as slave, then given phase shifting to all with EPWM4.

EPWM5 with EPWM4 180 degree phase shift.

EPWM6 with EPWM4 90 degree phase shift.

EPWM7 with EPWM4 270 degree phase shift.

here, EPWM4,EPWM5,EPWM6 is comming properly but EPWM7 is not comming properly. EPWM7 has same phase with EPWM4.

So any solution for it.....???????

this is my EPWM initialization.

void InitEPwm4Example()
{

EPwm4Regs.ETSEL.all = 0;
EPwm4Regs.ETSEL.bit.INTEN = 1; // enable ePWM5 interrupt
EPwm4Regs.ETSEL.bit.INTSEL = 2; // CMPA down match
EPwm4Regs.ETPS.bit.INTPRD = 1; // 1st event

EPwm4Regs.TBPRD = 10000; // Set timer period 801 TBCLKs
EPwm4Regs.TBPHS.bit.TBPHS = 0;//0x0000; // Phase is 0
EPwm4Regs.TBCTR = 0x0000; // Clear counter

EPwm4Regs.CMPA.bit.CMPA = 5000; // Set compare A value

EPwm4Regs.TBCTL.bit.CTRMODE = 2; // up-down mode
EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm4Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 1
EPwm4Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1;

EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;

// Setup shadowing
EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero

// EPwm4Regs.AQCTLA.all = 0x0060;
EPwm4Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm4Regs.AQCTLA.bit.CAU = AQ_CLEAR;

// Active Low PWMs - Setup Deadband
EPwm4Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm4Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;
EPwm4Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm4Regs.DBRED.bit.DBRED = 100;
EPwm4Regs.DBFED.bit.DBFED = 100;

}

void InitEPwm5Example()
{

EPwm5Regs.TBPRD = 10000; // Set timer period 801 TBCLKs
EPwm5Regs.TBPHS.bit.TBPHS = 10000;//0x0000; // Phase is 0
EPwm5Regs.TBCTR = 0x0000; // Clear counter

EPwm5Regs.CMPA.bit.CMPA = 5000; // Set compare A value

EPwm5Regs.TBCTL.bit.CTRMODE = 2; // up-down mode
EPwm5Regs.TBCTL.bit.PHSEN = TB_ENABLE;//TB_DISABLE;
EPwm5Regs.TBCTL.bit.PHSDIR = TB_DOWN;
EPwm5Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 1
EPwm5Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1;

EPwm5Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

// Setup shadowing
EPwm5Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm5Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero

// EPwm5Regs.AQCTLA.all = 0x0060;
EPwm5Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm5Regs.AQCTLA.bit.CAU = AQ_CLEAR;

// Active Low PWMs - Setup Deadband
EPwm5Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm5Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;
EPwm5Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm5Regs.DBRED.bit.DBRED = 100;
EPwm5Regs.DBFED.bit.DBFED = 100;

}

void InitEPwm6Example()
{

EPwm6Regs.TBPRD = 10000; // Set timer period 801 TBCLKs
EPwm6Regs.TBPHS.bit.TBPHS = 5000;//0x0000; // Phase is 0
EPwm6Regs.TBCTR = 0x0000; // Clear counter

EPwm6Regs.CMPA.bit.CMPA = 5000; // Set compare A value

EPwm6Regs.TBCTL.bit.CTRMODE = 2; // up-down mode
EPwm6Regs.TBCTL.bit.PHSEN = TB_ENABLE;//TB_DISABLE;
EPwm6Regs.TBCTL.bit.PHSDIR = TB_DOWN;
EPwm6Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 1
EPwm6Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1;

EPwm6Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

// Setup shadowing
EPwm6Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm6Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero

// EPwm6Regs.AQCTLA.all = 0x0060;
EPwm6Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm6Regs.AQCTLA.bit.CAU = AQ_CLEAR;

// Active Low PWMs - Setup Deadband
EPwm6Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm6Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;
EPwm6Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm6Regs.DBRED.bit.DBRED = 100;
EPwm6Regs.DBFED.bit.DBFED = 100;

}

void InitEPwm7Example()
{

EPwm7Regs.TBPRD = 10000; // Set timer period 801 TBCLKs
EPwm7Regs.TBPHS.bit.TBPHS = 5000;//0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter

EPwm7Regs.CMPA.bit.CMPA = 5000; // Set compare A value

EPwm7Regs.TBCTL.bit.CTRMODE = 2; // up-down mode
EPwm7Regs.TBCTL.bit.PHSEN = TB_ENABLE;//TB_DISABLE;
EPwm7Regs.TBCTL.bit.PHSDIR = TB_UP;
EPwm7Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 1
EPwm7Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1;

EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

// Setup shadowing
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero

// EPwm7Regs.AQCTLA.all = 0x0060;
EPwm7Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm7Regs.AQCTLA.bit.CAU = AQ_CLEAR;

// Active Low PWMs - Setup Deadband
EPwm7Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm7Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;
EPwm7Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm7Regs.DBRED.bit.DBRED = 100;
EPwm7Regs.DBFED.bit.DBFED = 100;

}

PLZ suggest some solution. i don't get EPWM7 proper phase shift with EPWM4 for any values. always getting same phase with EPWM4.