• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 82 subscribers
  • Views 510 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377D: McBSP through DMA in oneshot mode

Fab
Prodigy 160 points
Part Number: TMS320F28377D
Other Parts Discussed in Thread: TMS320C6657,

Hi.

I try to communicate through McBSP in DMA mode between a TMS320F28377D (DELFINO) and a TMS320C6657 (C66).

I can't use McBSP as SPI because the C66 processsor doesn't support SPI protocol (see document SPRUHH0—May 2012 paragraph 2.10).

So I'd like to have the same configuration for C66 and DELFINO processors.

Below, I'd like  to give you an example what I want (for simplify the graph, I represent a transfer with 2 words of 8 bits instead of two words of 16 bits) :

With my current configuration, I have a frame synchronisation signal between each word.

Do you have any idea of register configuration that allows to have the operating mode in the graph ?

Thanks in advance.

  • 0
    Guru 30330 points
    Hi Fab,

    I would look at the dual phase frame configuration. See Section 21.3.4.4 Implementing the AC97 standard with Dual-Phase Frame in the TRM for an idea of how this could work. You want to configure the Mcbsp to have one 8-bit word per phase.

    -Mark
  • 0 in reply to Mark Labbato
    Prodigy 160 points

    Hi Mark.

    Sorry, it seems that I have not been clear.

    I just want to send x words in a single phase with only one frame synchronisation pulse (not one pulse of FSX per word) in DMA mode. 

    In my McBSP current configuration, I have:

    XCR1->XFRLEN1 = x (size of frame = x+1 words)

    XCR1->XWDLEN1 = 2 (word = 16 bits)

    XCR2->PHASE = 0 (Single-phase frame)

    XCR2->XDATDLY= 0 (0-bit data delay)

    SPCR1->CLKSTP = 2

    PCR->CLKXP = 0

    PCR->CLKRP = 0

    PCR->CLKXM = 1

    PCR->SCLKME = 0

    SRGR2->CLKSM = 1

    SRGR1->CLKGDV

    PCR->CLKRM = 0

    PCR->FSXM = 1

    SRGR2->FSGM = 0

    PCR->FSRM = 0

    PCR->FSXP = 1

    PCR->FSRP = 1

    And in my DMA configuration, I have:

    BURST_SIZE.all = 0
    SRC_BURST_STEP = 0
    DST_BURST_STEP = 0


    SRC_TRANSFER_STEP = 1
    DST_TRANSFER_STEP = 0

    SRC_WRAP_SIZE = 0xFFFF
    SRC_WRAP_STEP = 0
    DST_WRAP_SIZE = 0xFFFF
    DST_WRAP_STEP = 0

    MODE->CHINTE = 1
    MODEvDATASIZE = 0
    MODE->CONTINUOUS = 0
    MODE->ONESHOT = 0
    MODE->PERINTE = 1
    MODE->OVRINTE = 0
    MODE->CHINTMODE = 1

    Any idea of what configuration registers are wrong?

    Thanks in advance.

  • 0 in reply to Fab
    Guru 30330 points
    Thanks for the additional clarification. It looks like you are trying to use the Clock Stop mode (SPI mode). In this mode, the FSX behaves as the Chip Select signal would in a standard SPI module. FSX will always toggle in between consecutive words when in Clock stop mode. If you do not wish this to occur, you can drive a GPIO instead of using FSX. With oneshot DMA, you would set the GPIO to the active state, then at the end of the DMA burst, you would drive the GPIO inactive.

    The image you show is using the basic McBSP mode, with either a two phase frame, or a single phase frame with multiple words per frame as I originally suggested. If you notice, the Clock is also constantly toggling before and after the data is transmitted. You mentioned that the C66 does not support SPI mode of the McBSP, so you need to not use the SPI mode of the C28 McBSP. Set CLKSTP to 0.