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TMS320F2812: How to use distributed clock synchronization on my tms320f2812 DSP.

Raghu Rajappa
Intellectual 295 points
Part Number: TMS320F2812

Hi,

I currently use the PC (running TwinCAT 3.1) -> EtherCAT slave controller piggyback (ET1100) -> tms320f2812 DSP (slave running SOES slave stack code). 
My intention is to use Distributed clock (DC) to synchronize the communication to/from PC to the DSP. 
What I understand - I need to edit the DC settings in the ESI files that will be flashed into the ET1100 through TwinCAT (or another way). There will be a SYNC signal to/from ET1100 and the DSP to keep them in sync. I also understand the DC protocol theory. 

What I am doubtful - The DC is a 64 bit value that is communicated at the start of every frame by the master (in my case the PC). This value is then taken by each slave in the ethercat topology lines and then each slave adds it's local timestamp (64 bit value) to it's section of the frame. Eventually the master and the slave will take each other's values (depending on which one is made the reference) and then corrects it's own clock to the desired value. PLEASE CORRECT ME ON THIS IF I AM WRONG. I want the puzzle (SOFTWARE FLOW)  to be crystal clear in my head. 

What I DON"T understand (I tried to write this question to SOES rt-labs but they didn't respond and also Beckhoff wouldnt support because I am using SOES) -
How to handle the DC (functions) in the TI's DSP. In my head this understanding is very blur and some light (in the form of informaiton or sample code) in this direction will be very helpful. Please note I don't use AL_IRQ interrupts.
I will re-iterate the problem -
1. I don't have a clear understanding of how the FRAME (from master to slave and back) will look like when DC is added. 
2. I don't understand how the functions will look like (what do these functions perform) in the DSP side (slave) to handle this DC. 

Any information or light in this direction will be greatly appreciated. I have looked through the material in the ethercat.org and beckhoff.com website. They have information that I understand (like the theory behind DC and how it will help). I couldn't find information on the questions I ask here. 


Kind Regards,
Raghu

  • 0
    TI__Mastermind 19810 points

    Raghu,

    based on my experience with the ETG stack and ET1100 with F2937xD MCU, the DCx functionality is supported by ET1100. It has a time base inside that gets initialized and adjusted as it receives/decodes the DCx packets, this happens in the ET1100 itself.

    Now the SYNC signal is pulled to active polarity every so many ms depending on the DCx settings of the network by the master and the slave MCU does whatever it is supposed to do (for ex toggle an IO or read a switch or much more complicated control) upon seeing the sync signal.

    when you have multiple slaves in the network and each of them doing some action on the sync signal you will have a network which is synchronized to a minimal jitter.

    Raghu Rajappa said:
    1. I don't have a clear understanding of how the FRAME (from master to slave and back) will look like when DC is added. 
    2. I don't understand how the functions will look like (what do these functions perform) in the DSP side (slave) to handle this DC. 

    so,

    for #1 above: you can check this from by capturing the packets on a wireshark. I haven't checked this yet myself. 

    for #2 above: it is upto the slave application implementation on what it has to do with the SYNC signal. The way I would check it is, set up the MCU to take an interrupt on the SYNC signal and toggle an IO. So you can have multiple nodes in network which can be spread about 100 or 200ft distance and see how close the IO toggles are on a scope. 

    Hope this helps.

    Best Regards

    Santosh Athuru