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deadband in the HVPM Sensorless example

Brad Mularcik
Intellectual 580 points
Other Parts Discussed in Thread: CONTROLSUITE

I am working with the HVPM Sensorless example for the 28335.  I am using my own inverter hardware instead of the HV Kit.  My inverter bridge is getting hot.  I looked at the gate drive signals on the o-scope and it does not look like there is any deadband between the high and low side drive signals.  Is there a place in the code to est this, or does the HV kit hardware take care of that?

Thanks,

Brad Mularcik

  • 0
    TI__Guru** 119670 points

    deadband is implemented in the PWM driver

    C:\ti\controlSUITE\libs\app_libs\motor_control\drivers\f2803x_v1.1\f2803xpwm.h

    #define DBCTL_INIT_STATE  (BP_ENABLE + POLSEL_ACTIVE_HI_CMP)

    #define DBCNT_INIT_STATE   100   // 100 counts = 1.66 usec (delay) * 100 count/usec (for TBCLK = SYSCLK/1)

     

    You aren't seeing any DB between A and B outputs?

  • 0 in reply to ChrisClearman
    Intellectual 580 points

    Chris,

    Upon closer inspection, I can see that there is a deadband.  My issue apears to be a logic inversion in the high side drive of the recycled inverter circuit that I am using.    Thank goodness for current limiting power supplies!

    Thanks for the help.

    Brad Mularcik