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Tool/software: TI C/C++ Compiler
Hello,
I am working with a linker cmd file that was created by a previous engineer and am coming up to speed on the memory allocation. This piccolo has 4 flash sectors. Currently, all of the working code is linked to FLASHB_C (on page 0), a union of two flash sectors. Sector FLASHA is currently used for a bootloader, but FLASHB_C is at over 90% utilization, so I want to place some of the unchanging functions in FLASHA (which is on page1) with the bootloader to free up code space and reduce utilization. The current linker file includes the following:
Flash28_API:
{
-lFlash2802x_API_V200.lib(.econst)
-lFlash2802x_API_V200.lib(.text)
} LOAD = FLASHB_C,
RUN = PRAML0,
LOAD_START(_Flash28_API_LoadStart),
LOAD_END(_Flash28_API_LoadEnd),
RUN_START(_Flash28_API_RunStart),
PAGE = 0
.cinit : > FLASHB_C PAGE = 0
.pinit : > FLASHB_C, PAGE = 0
.text : > FLASHB_C PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHB_C,
RUN = PRAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
PAGE = 0
csmpasswds : > CSM_PWL_P0 PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0
I am still very new to modifying the linker file. I see all of .text is thrown into FLASHB_C. I would like select .obj, e.g. FlashCal.obj, to go into FLASHA, but when I try to manually add it, the .map file does not change and I see FlashCal.obj is inside FLASHB_C. Do I need to individually allocate all file.obj(.text) > FLASH in order to separate out an individual .obj?
I am still learning what is important in this file. Let me know what other information from the cmd file you need, (I probably can't post the entire file).
Thanks for all the help!
Jackson
For some general background on linker command files, please see the article Linker Command File Primer. You might be able to figure out a solution from that alone.
Jackson Thomas said:I want to place some of the unchanging functions in FLASHA (which is on page1) with the bootloader
That's a reasonable idea. Except for one thing. Are you sure FLASHA is on page 1? I would expect it on page 0, like FLASHB_C. I don't know why it would be on page 1. We may have to involve some C28x device experts to work this out.
Thanks and regards,
-George
Thanks George,
It is indeed on Page 1 in the MEMORY section.
MEMORY { PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ PRAML0 : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ APP_SIGN : origin = 0x3F5FF6, length = 0x000002, fill = 0xA5A5 /* Part of FLASHC. Used to store Application signature. */ CKSM_RSVD : origin = 0x3F5FF8, length = 0x000006 /* Part of FLASHC. Used to store Application Checksum. */ BEGIN : origin = 0x3F5FFE, length = 0x000002 /* Part of FLASHC. Used for "boot to Flash" bootloader mode. */ FLASHB_C : origin = 0x3F2000, length = 0x003FEE /* on-chip flash sectors b and c 0x3F5FEF to 0x3F5FF6 is unused as per the Silicon Errata advisory. Please refer to www.ti.com/.../sprz292l.pdf for more details. */ FLASHD : origin = 0x3F0000, length = 0x002000 /* on-chip FLASH */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ /* FLASHB : origin = 0x3F4000, length = 0x002000 */ /* on-chip FLASH */ /* FLASHC : origin = 0x3F2000, length = 0x002000 */ /* on-chip FLASH */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */ RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ DRAML0 : origin = 0x008800, length = 0x000800 /* on-chip RAM block L0 */ FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH */ }
I understand that housing code would indicate it should also be on Page 0. I am not sure why it has been placed on Page 1. Is this a problem if we are trying to split the code placement?
Thank you, I have figured it out. Once I combined the two sections onto the same page I was able to move the .obj files to a different sector.
I ended up splitting FLASHA in two in the memory section, leaving FLASHA and FLASHA_2 each with half of the memory allocated to sector A.
FLASHA : origin = 0x3F6000, length = 0x001000 /* on-chip FLASH */ FLASHA_2 : origin = 0x3F7000, length = 0x000F80 /*Extra code space in FlashA*/
I then created a new section called Section_Extra_Flash, where I placed the .obj files I wanted to move, and allocated the rest of .text to FLASHB_C where it was housed before. I am not sure this new section was ultimately necessary but it was the only way I could get the code to compile.
Section_Extra_Flash: { File1.obj(.text) File2.obj(.text) File3.obj (.text) File4.obj (.text) } > FLASHA_2, PAGE = 0 .text : > FLASHB_C PAGE = 0
Now I can see in the map file that all 4 files are in Section_Extra_Flash and placed in memory location 0x3F7xxx. This was fairly straightforward once I defined a new section name, before that nothing would change memory locations.
Thanks