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TMS320F28377D: EQEP encoder use on CPU2

Norbert Klaes
Prodigy 80 points
Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

Hello folks,

we have treid to move the encoder calculation of speed and position from CPU1 to CPU2.

On CPU1 everything is working fine according the TI-example "eqep_pos_speed_cpu01".

Seeking to transfer the operation to CPU2 we did the following:

1.  in GPIO.c of CPU1 of the TI-example we changed

GPIO_SetupPinMux(20, GPIO_MUX_CPU1, 0);                   

to

GPIO_SetupPinMux(20, GPIO_MUX_CPU2, 0);                   

and accordingly for channel B(Pin21), C(Pin22) and Reset(Pin23)

2. during initialization we added

DevCfgRegs.CPUSEL2.bit.EQEP1 = 1;  // 0 for CPU1 and 1 for CPU2

3. POSSPEED_Init and POSSPEED_calc are called from CPU2

However speed and position on CPU2 are always zero.

Is there anythong else we have to do for POSSPEED calculation on CPU2.?

We are thankful for any hint and advice.

nk

  • 0
    TI__Genius 15385 points
    Hi Nokla,

    Few questions:

    1. I assume you build and compiled your test case with CPU2?
    2. What is CPU1 doing while CPU2 is running?
    3. Are you using IPC for handshake between CPU1 and CPU2?

    You can also refer to example that runs both CPUs in parallel for proper handshake.

    C:\ti\c2000\C2000Ware_1_00_05_00\device_support\f2837xd\examples\dual\blinky_dc

    Regards,
    Nirav
  • 0 in reply to Nirav Ginwala
    Prodigy 80 points

    Hi Nirav,

    both CPU´s are running fine. They can axchange data and do their normal job. It´s only the EQEP-Registers, that don´t show reasonable results on CPU2.

    Regards

  • 0 in reply to Norbert Klaes
    TI__Genius 15385 points

    Hi Nokla,

    Ok, good. Did you try debugging the code and making sure the eQEP is configured properly by CPU2 as it is done by CPU1?

    Regards,

    Nirav

  • 0 in reply to Nirav Ginwala
    TI__Genius 15385 points
    Hi Nokla,

    Are you still seeing issue with CPU2?

    Regards,
    Nirav
  • 0 in reply to Nirav Ginwala
    Prodigy 80 points

    Hi Nirav,

    the probelm could be solved by adding the enabling of the peripheral clock for EQEP1 on CPU2.

    We added

    CpuSysRegs.PCLKCR4.bit.EQEP1 = 1

    in Init.c of  CPU2.

    The function InitPeripheralClocks() of the system file F2837xD_SysCtrl.c enables only the peripheral clock if CPU1 is defined.

    Regards

    nokla