CCS/TMS320F280049: ePWM: AQCTLA & AQCTLB shadow to active register load behaviour

Part Number: TMS320F280049
Other Parts Discussed in Thread: LAUNCHXL-F280049C

Tool/software: Code Composer Studio

Dear TI community,

I found a strange behavior when I use shadow load for AQCTLA & AQTCLB registers. (AQCTL.bit.SHDWAQyMODE = 1)

I wan't to create a single PWM one pulse, so i config the ePWM module for normal operation, with the addition that i config the AQCTLA register to clear the A output in any case. With shadowed load this settings gets active after the first pulse (shadowed to active load when TBCTR == zero).

Here is my pwm start function:

void pfc_pwm_start( uint16_t generate_onepulse){

    EALLOW;

    uint16_t j;
    for (j=0;j<1;j++)
    {

        /*
         *  Set Action Qualifier register for normal operation
         *
         *      Main switch:    set     - counter == compare A (during up count)
         *                      clear   - counter == zero
         *
         *      Sub switch:     set     - counter == compare A (during up count)
         *                      clear   - counter == compare B (during up count)
         *
         *      Configure register first for immediate load, to make changes immediately active
         */
        (*ePWM[j]).AQCTL.bit.SHDWAQAMODE = 0;   // immediate load for ACTLA register
        (*ePWM[j]).AQCTL.bit.SHDWAQBMODE = 0;   // immediate load for ACTLB register

        (*ePWM[j]).AQCTLA.bit.CAU       = AQ_SET;
        (*ePWM[j]).AQCTLA.bit.ZRO       = AQ_CLEAR;
        (*ePWM[j]).AQCTLB.bit.CAU       = AQ_SET;
        (*ePWM[j]).AQCTLB.bit.CBU       = AQ_CLEAR;

        /*
         *  Set Action Qualifier register for One Pulse operation - If enabled
         *
         *      Clear both switches at all actions
         *
         *      Configure register first for shadowed load, to make changes active after next counter reset
         *      -> first pulse normal operation (configuration above),
         *         after first pulse clear all  (configuration below) -> one shot function
         */
        if(generate_onepulse){

            GpioDataRegs.GPASET.bit.GPIO6 = 1;
            GpioDataRegs.GPACLEAR.bit.GPIO6 = 1;

            (*ePWM[j]).AQCTL.bit.SHDWAQAMODE = 1;       // enable shadow load for ACTLA register
            (*ePWM[j]).AQCTL.bit.SHDWAQBMODE = 1;       // enable shadow load for ACTLB register
            (*ePWM[j]).AQCTL.bit.LDAQASYNC   = 0;
            (*ePWM[j]).AQCTL.bit.LDAQBSYNC   = 0;

            (*ePWM[j]).AQCTLA.bit.CAU       = AQ_CLEAR;
            (*ePWM[j]).AQCTLA.bit.ZRO       = AQ_CLEAR;
            (*ePWM[j]).AQCTLB.bit.CAU       = AQ_CLEAR;
            (*ePWM[j]).AQCTLB.bit.CBU       = AQ_CLEAR;

        }

        /*
         *  Force a one time action qualifier event to guarantee a low level for
         *  both switches at timer start
         */
        (*ePWM[j]).AQSFRC.bit.OTSFA = 1;
        (*ePWM[j]).AQSFRC.bit.OTSFB = 1;


        /*
         *  Clear permanent trip zone low level and start timer
         */
        (*ePWM[j]).TZCLR.bit.OST     = 1;               // clear one shot event
        (*ePWM[j]).TBCTL.bit.CTRMODE = TB_COUNT_UP;     // start counter

    }

    EDIS;

}

When I write 

(*ePWM[j]).AQCTL.bit.LDAQASYNC  = 1; // shadowed to active load @ LDAQAMODE (LDAQAMODE = 0) or SYNCIN event

(*ePWM[j]).AQCTL.bit.LDAQBSYNC = 1;

I will have the expected behavior (only one ePWM1A pulse CH4):

But when I write 

            (*ePWM[j]).AQCTL.bit.LDAQASYNC   = 0; // shadowed to active load only @ LDAQAMODE (LDAQAMODE = 0)
            (*ePWM[j]).AQCTL.bit.LDAQBSYNC   = 0;

I will have a strange behavior

In my opinion, there should be no difference between the two configurations, because shadowed to active load is in both cases @ TBCTR = zero and the DCAEVT1 will reset the TBCTR and the TBPHS register is zero! I have plot the EPWMSYNCO on CH2 for verification that a TBCTR zero event will be generated. After the first EPWMSYNCO pulse, the shadowed registers should transfered to the active registers. But in the second behavior, the active register gets never updated from the shadowed register.

Is it possible that this note causes this behavior: 

 Because resetting the pin and shadowed to active load is on the same clock cycle? (TBCTR == zero)

Thank you!