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Tool/software: Code Composer Studio
What are the minimum changes needed to execute code from flash? (no reading/writing data from the executing code to/from flash)
In the flash_programming_cpu examples the linker command file has the following:
#ifdef __TI_COMPILER_VERSION__ #if __TI_COMPILER_VERSION__ >= 15009000 GROUP { .TI.ramfunc { -l F021_API_F2837xD_FPU32.lib} } LOAD = FLASHD, RUN = RAMLS03, LOAD_START(_RamfuncsLoadStart), LOAD_SIZE(_RamfuncsLoadSize), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), RUN_SIZE(_RamfuncsRunSize), RUN_END(_RamfuncsRunEnd), PAGE = 0
Q1) Is it necessary to load F021_API_F2837xD_FPU32.lib if code is only executing from flash versus the code actively reading/writing data from the code to flash?
Q2) What else besides updating the MEMORY and SECTION areas to map the flash memory is required?
Kindly,
Graham
Hi Mark,
I had read through the material you posted. Though the Application Report seems a little dated.
I have code that ran fine when no flash memory was in use. With the new linker command file that utilizes flash memory the code complies and links without error. Though it doesn't run when it's in use.
It's hard to tell what I've missed. Below is the new linker command file. Did I miss something?
MEMORY { PAGE 0 : // Program memory // BEGIN is the start address for user code BEGIN: origin = 0x080000, length = 0x000002 // RAMMx is MCU dedicated, 1024 bytes each, 2048 total RAMM0: origin = 0x000122, length = 0x0002DE // 128 bytes CPUxCLA1toCPUxMSGRAM: origin = 0x001480, length = 0x000080 // 128 bytes CPUxtoCPUxCLA1MSGRAM: origin = 0x001500, length = 0x000080 // 512 bytes UPPTXMSGRAM: origin = 0x006C00, length = 0x000200 // 512 bytes UPPRXMSGRAM: origin = 0x006E00, length = 0x000200 // Local shared RAM, 2048 bytes each, 12288 total RAMLS0: origin = 0x008000, length = 0x000800 RAMLS1: origin = 0x008800, length = 0x000800 RAMLS2: origin = 0x009000, length = 0x000800 RAMLS3: origin = 0x009800, length = 0x000800 RAMLS4: origin = 0x00A000, length = 0x000800 RAMLS5: origin = 0x00A800, length = 0x000800 // RAMDx is MCU dedicated, 2048 bytes each, 4096 total RAMD0: origin = 0x00B000, length = 0x000800 RAMD1: origin = 0x00B800, length = 0x000800 // RAMGSn Globaly shared between MCUs, 4096 bytes each, 53,248 total RAMGS0: origin = 0x00C000, length = 0x001000 RAMGS3: origin = 0x00F000, length = 0x001000 RAMGS4: origin = 0x010000, length = 0x001000 RAMGS5: origin = 0x011000, length = 0x001000 RAMGS6: origin = 0x012000, length = 0x001000 RAMGS7: origin = 0x013000, length = 0x001000 RAMGS8: origin = 0x014000, length = 0x001000 RAMGS9: origin = 0x015000, length = 0x001000 RAMGS10: origin = 0x016000, length = 0x001000 RAMGS11: origin = 0x017000, length = 0x001000 RAMGS12: origin = 0x018000, length = 0x001000 RAMGS13: origin = 0x019000, length = 0x001000 RAMGS14: origin = 0x01A000, length = 0x001000 RAMGS15: origin = 0x01B000, length = 0x001000 // FLASHn, 8192 or 32,768 bytes each FLASHA: origin = 0x080002, length = 0x001FFE // 8,192 bytes FLASHB: origin = 0x082000, length = 0x002000 // 8,192 bytes FLASHC: origin = 0x084000, length = 0x002000 // 8,192 bytes FLASHD: origin = 0x086000, length = 0x002000 // 8,192 bytes FLASHEtoJ: origin = 0x088000, length = 0x030000 // 196,608 bytes FLASHK: origin = 0x0B8000, length = 0x002000 // 8,192 bytes FLASHL: origin = 0x0BA000, length = 0x002000 // 8,192 bytes FLASHM: origin = 0x0BC000, length = 0x002000 // 8,192 bytes FLASHN: origin = 0x0BE000, length = 0x002000 // 8,192 bytes // Reset RESET: origin = 0x3FFFC0, length = 0x000002 PAGE 1 : // Data memory // RAMMx is MCU dedicated, 1024 bytes each, 2048 total RAMM1: origin = 0x000400, length = 0x000400 // RAMGSn Globaly shared between MCUs, 4096 bytes each, 53,248 total RAMGS1 : origin = 0x00D000, length = 0x001000 RAMGS2 : origin = 0x00E000, length = 0x001000 // MCU shared, 1024 bytes each, 2048 total CPU2TOCPU1RAM: origin = 0x03F800, length = 0x000400 CPU1TOCPU2RAM: origin = 0x03FC00, length = 0x000400 } SECTIONS { // Code start entry point codestart: > BEGIN, PAGE = 0 // Initialized C global variables at startup .cinit: > FLASHA, PAGE = 0 // Stdio buffer .cio: > RAMGS0, PAGE = 0 // Reset .reset: > RESET, PAGE = 0, TYPE = DSECT // not used // Jump tables for switch statements .switch: > FLASHA, PAGE = 0 // Executable code .text: >> FLASHEtoJ, PAGE = 0 // Reserve space for unintialized variables .ebss: > RAMGS1, PAGE = 1 // Initialized const objects .econst: > FLASHA, PAGE = 0 // Dynamic memory allocation .esysmem: > RAMGS2, PAGE = 1 // Function call stack, cio (printf) requires a larger stack .stack: > RAMM1, PAGE = 1 #ifdef __TI_COMPILER_VERSION__ #if __TI_COMPILER_VERSION__ >= 15009000 .TI.ramfunc LOAD = FLASHA, RUN = RAMLS0, PAGE = 0 #else ramfuncs: > RAMM0, PAGE = 0 #endif #endif }
I suspect the repeated questions on this topic are due to the method the documentation presents it. The required material is typically available in the documentation but it's presented in a way that can be challenging for engineers unfamiliar with TI MCUs.
Kindly,
Graham