This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Tool/software: Code Composer Studio
Hi TI experts,
I have a program with 50kHz PWM and 25kHz ADC sampling frequency. It works well. The logic flow is straightforward. The ePWM module is programmed to have a frequency of 50kHz, and it triggers the ADC SOC every other time when the ePWM counter reaches zero. Then the ADCISR, triggered by ADC EOC at a frequency of 25kHz, serves as the main ISR.
Now I need to increase the PWM frequency to 100kHz. However, the main ISR will not be able to finish in 20us (50kHz). So my question is how to get 100kHz PWM while keeping the main ISR frequency unchanged at 25kHz?
It seems ADC SOC can be triggered every, every second, and every third time the ePWM counter reaches zero, not every fourth. Any quick and easy way to work around it without getting into too much trouble like interrupt nesting?
Thank you for your help in advance.
Ivan,
Without nesting if your main ISR takes 20uS then it will delay your PWM ISR from running the next period. I don't see a way around this even if you could filter down to every fourth event in the Event Trigger submodule.
Can you shorten the length of your main ISR? Maybe you could move some calculations out of your main ISR and into the main code or another ISR.
Are you using the CLA? You may be able to updated the PWMs using the CLA which will give the C28x core more time to run the main ISR.
Regards,
Cody