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We are using TMS320F28377D processor for our project and CCS version is 8.1.0.00011. with reference to datasheet SPRS880K,
The M1 RAM region ends at 0x0000 07FF and the Peripheral Registers starts from 0x0000 0B00, I would like to know the memory between (0x0000 07FF and 0x0000 0B00) these two locations comes under which type of RAM? Is it possible to protect this memory region from CPU write access?
My application configured stack from 0x0000 0000 to 0x0000 07FF and while do simulating stack overflow it keeps writing beyond 0x0000 07FF, so I would like to generate exception if it goes beyond the specified limit.
Thanks in advance.
Subhash,
Address range which is not defined in memory map is reserved and user need to make sure there is no access made to that region. During execution, ITRAP happens if instruction fetch happens from reserved space but there is no error generated incase of READ/WRITE. Also there is no protection available in hardware for reserved space but we have an app note which provides the detail on how stack overflow can be detected in software.
Regards,
Vivek Singh
Hi Vivek,
Thank you so much for the response, I had gone through the document given in the link, I have a doubt on the selection of mask value, can you elaborate the significance of range mask (0x0007) in the below example:
Example:
Let's look at a configuration example:
stack start address = 0x00008123
stack end address = 0x00008523 (i.e., stack length is 0x400 words)
specified overflow range = 8 (i.e., the range mask is 0x0007)
specified range starting distance from end of stack = 45 words
Hi Subash,
Can you explain with more detail what the confusion is? The range is how many 16-bit words the triggering memory area is long. The SPRA820 appnote p.10 explains why a range is 8 or 16 is recommended:
"The size of the watchpoint range must be large enough to ensure that accesses into the stack don't accidentally skip over the monitored addresses (e.g., because of manual stack pointer manipulation that skips some number of stack locations, or 32-bit stack pushes where only the even address goes out on the address bus). The downside of using too large a range is that the start of the range must be aligned on an N-bit boundary, and therefore larger ranges may need to have their starting address shifted significantly from the specified reference address in order to achieve alignment. This can further waste memory by reducing the amount of available stack space before the watchpoint triggers. In general, stack growth on the C28x DSP is sequential, with no skipped spaces, so a fairly small range size may be used. It is recommended that a range size of 8 or 16 be used (recall that the range size is specified as a bit mask, and therefore must be of size 2^N). This is small enough to avoid significant alignment shifting, and large enough to handle unforeseen stack pointer manipulation issues."
If you set range too small (say 1 word), then you must have a stack access on exactly that one word in order to trigger the watchpoint. It is quite possible to miss this single word as the stack grows. For example, you call a function, and an odd aligned stack pointer gets even aligned to push a 32-bit word onto the stack. Aligning will cause you to skip a word before the push. If the skipped word happens to be the word you are monitoring, you won't trigger the watchpoint. I suggested setting range to 8 or 16 words in the appnote to try to cover all envisioned cases where the stack might skip some words. Honestly, this was not done with a lot of investigation. I just didn't see any situations where 8 or more stack locations are skipped, so I figured 8 or 16 locations was plenty.
Regards,
David
Regards,
David
David,
Thank you so much for your detailed explanation. I have made configuration to watch point registers (WP0) and IER = 0x8000 for RTOSINT as per SPRA820. The application able to own the Watch point access during run time. Nevertheless when the Stack Pointer crosses the monitor region, IFR becomes = 0x8000 and not executing ISR, instead the execution halts at etrap. When I checked the appropriate ISR fetch location for RTOSINT (0x0000 0D20), the interrupt service routine address is configured properly.
in other words Application able to detect the stack overflow condition and it is setting appropriate flags, but it is not jumping to configured ISR function (RTOSINT) as expected.
Could you please help me on this issue.
Subash,
When you say the exection halts at "etrap", what do you mean? An ESTOP0 instruction?
I made a quick example (CCSv9.2 project) and tested on F28377S. It works. The example is attached to this post. You should be able to run this on CPU1 of F28377D. When the watchpoint triggers, the program will halt at the ESTOP0 instruction in the RTOSINT_ISR function.
Regards,
David
Apologies, I couldn't reply owing to my personal vacation. The suggestion works as expected. I could generate exception when the stack pointer crosses the threshold. Thank you so much for your inputs.