TMS320F28379D: Maximum SPI Clock Rate in Slave Mode using High Speed GPIO

This question is actually for F2837x and F28004x families of devices. What is the maximum SPI clock rate supported in Slave mode. If I read the datasheet(s), it says 4 LPSYSCLK cycles. I interpret that to be:

• F2837x: 50 MHz
• F2807x: 30 MHz
• F28004x: 25 MHz

Are there any other limitations that I should know about which would restrict the SPI clock rate further in slave mode.

Thanks,

Stuart