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Original question:

TMS320F280049C: CLA memory access

TMS320F280049C: Variables in CLA debug

Kevin Chen31
Prodigy 230 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: C2000WARE

Hi C2K experts,

I have a struct variable in local shared memory.:

typedef struct {
// Inputs
float32 Ref;
float32 Fdbk;

// Internal values
float32 Errn;
float32 Errn1;
float32 Errn2;

// Output values
float32 Out;
float32 Out1;
float32 Out2;
float32 OutPresat;
} CNTL_2P2Z_CLA_C_Vars;

In .cmd file:

CommonDataRAM    : > RAMLS2,           PAGE = 0

In CLA init.c

MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS2 = 0U;

MemCfgRegs.LSxMSEL.bit.MSEL_LS2 = 1U;

in cla_task.c

#pragma DATA_SECTION(vloop_vars, "CommonDataRAM");
volatile CNTL_2P2Z_CLA_C_Vars vloop_vars;

__interrupt void Cla1Task1(void)
{
       __mdebugstop();

       vloop_vars.Ref = 100;
       vloop_vars.Fdbk = 92;

        normal_routine();

}

However, I saw both of these two variables are 0 in CLA, but correct value in C28.

I don't know if it is normal ?? Or how should I get correct value in CLA ?

C28:

Thanks,

  • 0
    TI__Guru 50470 points

    Hi,

    Please take a look at

    https://processors.wiki.ti.com/index.php/Control_Law_Accelerator_(C2000_CLA)_FAQ

    In single stepping the code, CLA -  it moves pipeline ahead 1 cycle where as C28, it flushes the pipeline.

  • 0 in reply to Santosh Jha
    Prodigy 230 points

    Hi Santosh,

    Thanks for your reply.

    So, you are saying that these variables are moved to pipeline already that is why they are all "0" in CCS?

    And if I declare the variable as "Cla1ToCpuMsgRAM", the variables will not be  "0".

    Thanks,

  • 0 in reply to Kevin Chen31
    TI__Guru 50470 points

    Hi Kevin,

    It could be related to security. Please take a look at this thread.

    https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/699278?TMS320F28377D-CLA1-couldn-t-read-write-to-assigned-LS-memory-#pi320995=2

    Can you try placing, Cla1Prog in RAMLS0, and then configure it accordingly.

    Cla1Prog         : > RAMLS0,           PAGE = 1

    MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMMASTER_CPU_CLA1);
    MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMMASTER_CPU_CLA1);
    MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS2, MEMCFG_LSRAMMASTER_CPU_CLA1);
    MemCfg_setCLAMemType(MEMCFG_SECT_LS0, MEMCFG_CLA_MEM_PROGRAM);
    MemCfg_setCLAMemType(MEMCFG_SECT_LS1, MEMCFG_CLA_MEM_DATA);
    MemCfg_setCLAMemType(MEMCFG_SECT_LS2, MEMCFG_CLA_MEM_DATA);

  • 0 in reply to Santosh Jha
    Prodigy 230 points

    Hi Santosh,

    After I modified 

    CommonDataRAM    : > RAMLS2,           PAGE = 1

    I can get correct value in CLA mode.

    In the thread :

    "We found that CLA was not secure but it was trying to access secure RAM which is not allowed. CLA can only access secure RAM if CLA is also grabbed by same zone. So either make RAMs unsecure or grab CLA as well from same zone."

    How do I know the CLA zone or make RAMs unsecure? Since LS0 RAM~ LS7 RAM are secure.

    Below is my .cmd file.

    28004x_generic_flash_lnk.zip

    Thanks,

  • 0 in reply to Kevin Chen31
    TI__Guru 50470 points

    On F280049C device, memory sections M0/M1 and GSx memories are not secure. Please refer to TRM section 3.13.6

  • 0 in reply to Kevin Chen31
    TI__Guru** 113625 points

    HI Kevin,

    How do I know the CLA zone or make RAMs unsecure? Since LS0 RAM~ LS7 RAM are secure.

    You don't have to make CLA secure on this device but are you sure LS0-LS7 are secure ? This is user configurable so unless you program the security setting to secure them, these RAMs will be unsecure only. So it does not look like security issue.

    You mentioned when you assigned  CommonDataRAM to PAGE 1 (which is data section and correct way to define), it works fine. In case you assign it to PAGE 0, does it has issue only with variable display in CCS watch window or also code did not work fine ?

    Regards,

    Vivek Singh 

  • 0 in reply to Vivek Singh
    Prodigy 230 points

    Hi Vivek,

    YES, I don't configure these RAMs (LS0~LS7) as secure.

    And YES, if I assign it to PAGE 0, it has issue only with variables display in CCS but the code seems work fine.

    So, that means we should configure the PAGE number of data section to "1", if we want to see the correct value when debug with CLA.

    But, it is OK if we just run in C28.

    "You mentioned when you assigned  CommonDataRAM to PAGE 1 (which is data section and correct way to define)....."

    ==> After I checked "28004x_cla_flash_lnk.cmd" in C2000Ware, I probably got your point.

    Thanks,

  • 0 in reply to Kevin Chen31
    TI__Guru 50470 points

    Kevin,

    Your issue resolved? Can we close the thread now.

  • 0 in reply to Santosh Jha
    Prodigy 230 points

    Hi, Santosh, Vivek,

    Yes, this question is resolved.

    Thanks,