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TMS320F28335 forcing POR GPIO Input LOW with default Pullup

Other Parts Discussed in Thread: TMS320F28335

On the TMS320F28335: 

For non-ePWM GPIO, during power on RESET, with default weak-pullup, externally what value pull down resistor is needed to force a LOW state (<0.4 V).  Section 6.3 Electrical Characteristics for I(IL) with pullup enabled shows Typical Input Current of -140uA.  Does that mean the external pull down resistor to ensure LOW state (0.4V) would have to be 0.4 / 160uA OR 2.5kohm to ground ??  That would lead to 1.3mA of OUTPUT HIGH state burden without any added FANOUT on the GPIO pin, is this correct or am I not figuring correctly?

I want deterministic control signal status coming out of power on Reset (glitch prevention) and also am concerned with thermal management for the accumulated forced pull down on several GPIO pins and the resulting burden with GPIO driving loads HIGH. 

I don't have board space enough to tri-state buffer all of my I/O signals from the F28335.

My understanding is ALL non-ePWM GPIO pins default to having weak pull-up enabled at POR.

thank you

 

  • Yes, in order to ensure 0.4V or less, a 2.5K ohm or lower value to ground would be required.  The TMS320F28335 indicates a maximum current of -190uA, not -160uA.

    GPIO[11:0] do not have the pullup enabled at reset.  GPIO[87:12] do have the pullup enabled at reset.  This is per the paragraph just before Table 2-3 in the datasheet.

    This paragraph also indicates that all GPIO pins have an internal pullup which can be selectively enabled/disabled on a per-pin basis.