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TMS320F28379D: SCI - UART communication mode and the Multiprocessor mode

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Hello,

 I am working on using SCI with fiber and I would like to configure the SCI in UART mode. 

1. How do I configure the SCI in UART mode ? Are the protocols for UART and multiprocessor modes the same ?

2. How does the idle-line wake up and the address bit wake up make a difference in UART mode ? If I go with the address bit wake up mode, is the address the address of the slave ?

3. In case I disable the sleep bit and the Twake bit and choose idle line mode, do I still have to follow the protocol defined by the idle line multiprocessor mode ?

  • Hello,

    Thank you for your question! SCI communication is actually more commonly known as UART. Please see Chapter 19 of the Technical Reference Manual (www.ti.com/.../spruhm8i.pdf) for more details on how the SCI/UART interface works. Each of these questions can be addressed in this chapter of the reference manual.

    To answer your questions briefly:

    1. Please see the C2000Ware software examples for SCI (UART) configuration

    2. Chapter 19.8 and 19.9 elaborate in great detail on these two modes and will better help in determining the best mode to use

    3. Disabling the sleep bit and choosing the idle line mode is not standard. If I understand your question properly, for the end application, this would seem to be similar to using the address bit mode (without the addressing). Would you be able to elaborate on the purpose of using the idle line mode without the sleep bit?

    Regards,

    If the above answers are sufficient, let us know! If not, please feel free to provide follow up clarification/questions.

    Regards,

    Vince

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  • Hello Vince,

    Thank you for your prompt reply. I am planning on using a fiber link between the two controllers for communication. To realize the fiber based communication I need to use work with UART i.e., SCI.

    I do understand that SCI is otherwise known as UART. But SCI allows both multiprocessor mode communication (Half duplex) and asynchronous communication / UART mode (full duplex). But as per my understanding of the manual the protocol for both remain the same i.e., address-bit protocol or idle line protocol - either it should have idle bits or a slave address.

    But by setting TWAKE to 0 and Sleep bits to 0 and enabling idle line protocol, I ensure that the SCI doesnt provide the 11 bit idle time. If I follow this setting, I should be able to work with only start, data and stop bits and avoid the need for address bits as per (https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/538986/1963960?tisearch=e2e-sitesearch&keymatch=SCI%2525252520-%2525252520address%2525252520bit%2525252520wake%2525252520up%2525252520mode#1963960).

    In that case can I work with a data format that has a 16-bit data block, with two frames in which each frame has a start bit, data bit and a stop bit . Is this possible ? Or should I necessarily add an address frame to the block ? Is adding an address frame still mandatory even though I am working with a point to point connection ? Also, if the address is the address of the slave why is it necessary in a point to point connection - Is this a security feature of SCI ? If I can eliminate the address frame or the idle bits between blocks, I can transmit date faster. 

    Please clarify. 

    Thanks & Regards,

    Radha

  • Hi Radha,

    Thanks for the clarification, I now understand what you are trying to do. Theoretically, what you are describing makes sense. But I would like to check if there is anything that could cause an issue with such a configuration. I will look into this and get back to you with a result early next week.

    Regards,

    Vince

  • Hello Vince,

    Really appreciate that. Thanks for checking this for me and I am looking forward to your reply next week.

    Can you clarify if I need to have to have a frame for the address in this case ? Is that a default requirement or something ?

    Thanks & Regards,

    Radha

  • Hi Radha,

    I will answer your previous questions here first, which may answer your follow up question:

    After looking into this and actually implementing what you are describing above (idle-line mode, TXWAKE=0, SLEEP=0), I realized that this is actually the default state of the SCI peripheral, which I didn't catch when reading through it. By doing this, you can just send data (in groups of up to 8 data bits) with nearly no delay between blocks of frames. See image below of a test run with all SCI settings in default (idle-line mode, TXWAKE=0, SLEEP=0) and a character being repeatedly passed into the FIFO:

    The idle-line and address modes described in the technical reference manuals are meant to describe formats for differentiating the actual blocks of frames. You can definitely use idle-line mode with no delay between blocks of frames, but it is useful to have a way to differentiate between blocks of frames, or between when one device is sending vs finished sending frames.

    The important thing to note is that the system will need to implement a way in its firmware to determine when the stream of data is done. That is where the idle-line recommendation becomes useful (by having the address frame and idle period of 10 bits or more).

    But to answer your questions, address frame and idle period are not required in idle-line mode, but are the recommended way of formatting at the system level. 

    "In case I disable the sleep bit and the Twake bit and choose idle line mode, do I still have to follow the protocol defined by the idle line multiprocessor mode ?"

    And for this question, the protocol defined by the idle line multiprocessor mode is not strictly necessary, but is a very helpful recommended way to actually decipher the data blocks.

    Thanks again for your questions, and let me know if this was able to answer them!

    Regards,

    Vince

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  • Hello Vince,

    Thank you for testing this out. Really appreciate your quick response. I see your point on trying to differentiate the frames and I think that adding a address frame will help with this. In case I add a address frame is the address the slaves address and where should it be configured ?

    Thanks & Regards,

    Radha

  • Hi Radha,

    Thanks for the follow-up! The address is actually whichever device is the receiver for a given situation. So the transmitting device (let's call it device address 0) will send to a receiving device (let's call it device address 1). In this case, device 0 will send as the first frame an address frame with the value 1. This will let device 1 know that the message is meant for it.

    Now to configure this, this is all done as part of the interrupt routine, and is done by the end-user (as the addresses and applications may vary widely in how this gets used). So this would have to be implemented as a software routine by the end-user (to make a given device look for its own address).

    Regards,

    Vince

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  • Hello Vince,

    Is there any example from TI for configuring this address ? Can you please point me to one if any ?

    Thanks & Regards,

    Radha

  • Hello Radha,

    Unfortunately there are no examples for configuring the address from TI.

    Regards,

    Vince

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    If I was able to answer your question, please press the green "Verified" button below, thanks!

  • Hello Vince,

    Appreciate all your timely responses. Thank you for testing the format for me.

    Thanks & Regards,

    Radha

  • Hello Vince,

    Few more clarifications on the SCI communication. I understand that you tested the communication in UART/asynchronous communication mode. The manual mentions that there are 8 SCICLK periods per data bit. Did this impact your chosen baud rate ?

    Please clarify this.

    Thanks & Regards,

    Radha