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Greetings,
I am planning pinouts for a new generation of our HW. So I’m examining Table 26-3 Peripheral Signal Multiplexer Table and Table 8-7 GPIO Muxed Pins and have a question. Using EPWM1.PWMA (table 26-3) and EPWM1A (table 8-7) as an example, and assuming the GPIO0 has been setup to output EPWM1A, the signal will appear on both GPIO0 and GPIO145. I’m assuming that the Peripheral Signal Multiplexer will also send its signal to both pins and that both pins would always have the same signal i.e. both would have PWMA or both would have CLB_OUT0_0. Is this true?
Thank you,
Ed
