TMS320F280049C: SPI in master mode is not working

Alihussain Vohra

Part Number: TMS320F280049C
Other Parts Discussed in Thread: TIC12400

I am using spi_ex4_eeprom.c driver lib example. I have probed my clock and it is working. I am sending data on MOSI but it is not showing on probe. I am using 8bit and 1MHZ SPI clock.I am attaching my code. Thanks in advance.

Fullscreen 2620.main.c Download

//#############################################################################
//
// FILE:   spi_ex4_eeprom.c
//
// TITLE:  SPI EEPROM
//
//! \addtogroup driver_example_list
//! <h1>SPI EEPROM</h1>
//!
//! This program will write 8 bytes to EEPROM and read them back. The device
//! communicates with the EEPROM via SPI and specific opcodes. This example is
//! written to work with the SPI Serial EEPROM AT25128/256.
//!
//! \b External \b Connections \n
//!  - Connect external SPI EEPROM
//!  - Connect GPIO8/SPISIMO on controlCARD (GPIO16 on LaunchPad) to external
//!    EEPROM SI pin
//!  - Connect GPIO9/SPICLK on controlCARD (GPIO56 on LaunchPad) to external
//!    EEPROM SCK pin
//!  - Connect GPIO10/SPISOMI on controlCARD (GPIO17 on LaunchPad) to external
//!    EEPROM SO pin
//!  - Connect GPIO11/CS to external EEPROM CS pin
//!
//! \b Watch \b Variables \n
//!  - None
//!
//
//#############################################################################
// $TI Release: F28004x Support Library v1.11.00.00 $
// $Release Date: Sun Oct  4 15:49:15 IST 2020 $
// $Copyright:
// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
//
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the
//   distribution.
//
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################

//
// Included Files
//
#include "driverlib.h"
#include "device.h"
#include "stdio.h"

//
// Defines
//
#define EEPROM_ADDR                 0x0000
#define NUM_BYTES                   8

//
// SPI EEPROM status
//
#define MSG_STATUS_READY_M          0x0001 // EEPROM is ready (not busy)
#define MSG_STATUS_WRITE_READY_M    0x0002 // EEPROM
#define MSG_STATUS_BUSY             0xFFFF // EEPROM is busy (internal write)

//
// Opcodes for the EEPROM (8-bit)
//
#define RDSR                        0x0500
#define READ                        0x0300
#define WRITE                       0x0200
#define WREN                        0x0600
#define WRDI                        0x0400
#define WRSR                        0x0100

//
// Defines for Chip Select toggle.
//
#define CS_LOW                      GPIO_writePin(11, 0)
#define CS_HIGH                     GPIO_writePin(11, 1)

//
// Globals
//
uint16_t writeBuffer[8] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 };
uint16_t readBuffer[8] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };

//
// Function Prototypes
//
void initSPI(void);
uint16_t readStatusRegister(void);
void writeData(uint16_t address, uint16_t * data, uint16_t length);
void readData(uint16_t address, uint16_t * data, uint16_t length);
void enableWrite(void);

//
// Main
//
void main(void)
{
    uint16_t error = 0;
    uint16_t i;

    //
    // Initialize device clock and peripherals
    //
    Device_init();

    //
    // Disable pin locks and enable internal pullups.
    //
    Device_initGPIO();

    //
    // Initialize GPIOs 8,9,10,11 (16,56,17,11 on LaunchPad)
    // for SPISIMO, SPICLK, SPISOMI, CS respectively
    //
    GPIO_setPadConfig(DEVICE_GPIO_PIN_SPISIMOA, GPIO_PIN_TYPE_PULLUP);
    GPIO_setPinConfig(DEVICE_GPIO_CFG_SPISIMOA);
    GPIO_setQualificationMode(DEVICE_GPIO_PIN_SPISIMOA, GPIO_QUAL_ASYNC);

    GPIO_setPadConfig(DEVICE_GPIO_PIN_SPICLKA, GPIO_PIN_TYPE_PULLUP);
    GPIO_setPinConfig(DEVICE_GPIO_CFG_SPICLKA);
    GPIO_setQualificationMode(DEVICE_GPIO_PIN_SPICLKA, GPIO_QUAL_ASYNC);

    GPIO_setPadConfig(DEVICE_GPIO_PIN_SPISOMIA, GPIO_PIN_TYPE_STD);
    GPIO_setPinConfig(DEVICE_GPIO_CFG_SPISOMIA);
    GPIO_setQualificationMode(DEVICE_GPIO_PIN_SPISOMIA, GPIO_QUAL_ASYNC);

    GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
    GPIO_setPinConfig(GPIO_11_GPIO11); //GPIO_11_SPIA_STE);
    GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);

//    GPIO_setPadConfig(GPIO_9_GPIO9, GPIO_PIN_TYPE_STD); //MSDI RST
//    GPIO_setPinConfig(GPIO_9_GPIO9); //MSDI RST
//    GPIO_setDirectionMode(GPIO_9_GPIO9, GPIO_DIR_MODE_OUT); //MSDI RST

    //
    // Initialize the SPI
    //
    initSPI();

    //
    // Loop indefinitely
    //
    while (1)
    {
        CS_HIGH;
        uint32_t address = 0x01;
        uint16_t registers[4];
        uint16_t registers_recieve[4] = { 0x00, 0x00, 0x00, 0x00 };
        uint32_t send_data = (0x00000000 | (address << 25));

        registers[0] = send_data >> 24 & 0x00FF;
        registers[1] = send_data >> 16 & 0x00FF;
        registers[2] = send_data >> 8 & 0x00FF;
        registers[3] = send_data & 0x00FF;



        CS_LOW;
//        SPI_writeDataNonBlocking(SPIA_BASE, registers[0]);
//        SPI_writeDataNonBlocking(SPIA_BASE, registers[1]);
//        SPI_writeDataNonBlocking(SPIA_BASE, registers[2]);
//        SPI_writeDataNonBlocking(SPIA_BASE, registers[3]);

        SPI_writeDataBlockingNonFIFO(SPIA_BASE,  registers[0]);
        SPI_writeDataBlockingNonFIFO(SPIA_BASE,  registers[1]);
        SPI_writeDataBlockingNonFIFO(SPIA_BASE,  registers[2]);
        SPI_writeDataBlockingNonFIFO(SPIA_BASE,  registers[3]);

        registers_recieve[0] = SPI_readDataBlockingNonFIFO(SPIA_BASE);
        registers_recieve[1] = SPI_readDataBlockingNonFIFO(SPIA_BASE);
        registers_recieve[2] = SPI_readDataBlockingNonFIFO(SPIA_BASE);
//        registers_recieve[3] = SPI_readDataBlockingNonFIFO(SPIA_BASE);

        CS_HIGH;

//        //
//        // Wait until the EEPROM is ready to write data
//        //
//        while (readStatusRegister() & MSG_STATUS_READY_M == MSG_STATUS_READY_M)
//        {
//        }
//
//        //
//        // Enable wirte on the EEPROM
//        //
//        enableWrite();
//
//        //
//        // Wait until the EEPROM is ready to write data
//        //
//        while (readStatusRegister()
//                & MSG_STATUS_WRITE_READY_M == MSG_STATUS_WRITE_READY_M)
//        {
//        }
//
//        //
//        // Write to the EEPROM
//        //
//        writeData(EEPROM_ADDR, writeBuffer, NUM_BYTES);
//
//        //
//        // Wait until the EEPROM is ready to write data
//        //
//        while (readStatusRegister() & MSG_STATUS_READY_M == MSG_STATUS_READY_M)
//        {
//        }
//
//        //
//        // Read from the EEPROM
//        //
//        readData(EEPROM_ADDR, readBuffer, NUM_BYTES);
//
//        //
//        // Check received data for correctness
//        //
//        for (i = 0; i < NUM_BYTES; i++)
//        {
//            if (writeBuffer[i] != readBuffer[i])
//            {
//                error++;
//            }
//        }
    }
}

//
// Function to configure SPI A in FIFO mode.
//
void initSPI()
{
    //
    // Must put SPI into reset before configuring it.
    //
    SPI_disableModule(SPIA_BASE);

    //
    // SPI configuration. Use a 1MHz SPICLK and 8-bit word size.
    //
    SPI_setConfig(SPIA_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,
                  SPI_MODE_MASTER, 1000000, 8);

    //
    // Configuration complete. Enable the module.
    //
    SPI_enableModule(SPIA_BASE);
}

//
// Function to send RDSR opcode and return the status of the EEPROM
//
uint16_t readStatusRegister(void)
{
    uint16_t temp;

    //
    // Pull chip select low.
    //
    CS_LOW;

    //
    // Send RDSR opcode
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, RDSR);

    //
    // Dummy read to clear INT_FLAG.
    //
    temp = SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Send dummy data to receive the status.
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, 0x0000);

    //
    // Read status register.
    //
    temp = SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Pull chip select high.
    //
    CS_HIGH;

    //
    // Read the status from the receive buffer
    //
    return (temp);
}

//
// Function to send the WREN opcode
//
void enableWrite(void)
{
    //
    // Pull chip select low.
    //
    CS_LOW;

    //
    // Send the WREN opcode.
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, WREN);

    //
    // Dummy read to clear INT_FLAG.
    //
    SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Pull chip select high.
    //
    CS_HIGH;
}

//
// Function to write data to the EEPROM
// - address is the byte address of the EEPROM
// - data is a pointer to an array of data being sent
// - length is the number of characters in the array to send
//
void writeData(uint16_t address, uint16_t * data, uint16_t length)
{
    uint16_t i;

    //
    // Pull chip select low.
    //
    CS_LOW;

    //
    // Send the WRITE opcode.
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, WRITE);

    //
    // Dummy read to clear INT_FLAG.
    //
    SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Send the MSB of the address of the EEPROM.
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, (address & 0xFF00));

    //
    // Dummy read to clear INT_FLAG.
    //
    SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Send the LSB of the address to the EEPROM.
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, address << 8);

    //
    // Dummy read to clear INT_FLAG.
    //
    SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Send the data.
    //
    for (i = 0; i < length; i++)
    {
        //
        // Send the data.
        //
        SPI_writeDataBlockingNonFIFO(SPIA_BASE, data[i] << 8);

        //
        // Dummy read to clear INT_FLAG.
        //
        SPI_readDataBlockingNonFIFO(SPIA_BASE);
    }

    //
    // Pull chip select high.
    //
    CS_HIGH;
}

//
// Function to read data from the EEPROM
// - address is the byte address of the EEPROM
// - data is a pointer to an array of data being received
// - length is the number of characters in the array to receive
//
void readData(uint16_t address, uint16_t * data, uint16_t length)
{
    uint16_t i;

    CS_LOW;

    //
    // Send the READ opcode
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, READ);

    //
    // Dummy read to clear INT_FLAG.
    //
    SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Send the MSB of the address of the EEPROM
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, (address & 0xFF00));

    //
    // Dummy read to clear INT_FLAG.
    //
    SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Send the LSB of the address of the EEPROM
    //
    SPI_writeDataBlockingNonFIFO(SPIA_BASE, (address << 8));

    //
    // Dummy read to clear INT_FLAG.
    //
    SPI_readDataBlockingNonFIFO(SPIA_BASE);

    //
    // Read the data from the EEPROM
    //
    for (i = 0; i < length; i++)
    {
        //
        // Send dummy data to receive the EEPROM data
        //
        SPI_writeDataBlockingNonFIFO(SPIA_BASE, 0x0000);
        data[i] = SPI_readDataBlockingNonFIFO(SPIA_BASE);
    }

    CS_HIGH;
}

//
// End of File
//

device.h

Fullscreen 7701.device.c Download

//#############################################################################
//
// FILE:   device.c
//
// TITLE:  Device setup for examples.
//
//#############################################################################
// $TI Release: F28004x Support Library v1.11.00.00 $
// $Release Date: Sun Oct  4 15:49:15 IST 2020 $
// $Copyright:
// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################

//
// Included Files
//
#include "device.h"
#include "driverlib.h"
#ifdef __cplusplus
using std::memcpy;
#endif

#define PASS 0
#define FAIL 1

uint32_t Example_PassCount = 0;
uint32_t Example_Fail = 0;

//*****************************************************************************
//
// Function to initialize the device. Primarily initializes system control to a
// known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
// and enabling the clocks to the peripherals.
// The function also configures the GPIO pins 22 and 23 in digital mode.
// To configure these pins as analog pins, use the function GPIO_setAnalogMode
//
//*****************************************************************************
void Device_init(void)
{
    //
    // Disable the watchdog
    //
    SysCtl_disableWatchdog();

//#ifdef _FLASH
    //
    // Copy time critical code and flash setup code to RAM. This includes the
    // following functions: InitFlash();
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
    // are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
//#endif

    //
    // Set up PLL control and clock dividers
    //
    SysCtl_setClock(DEVICE_SETCLOCK_CFG);

    //
    // Make sure the LSPCLK divider is set to the default (divide by 4)
    //
    SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);

    //
    // These asserts will check that the #defines for the clock rates in
    // device.h match the actual rates that have been configured. If they do
    // not match, check that the calculations of DEVICE_SYSCLK_FREQ and
    // DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
    // expected if these are not correct.
    //
    ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
    ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);

#ifndef _FLASH
    //
    // Call Device_cal function when run using debugger
    // This function is called as part of the Boot code. The function is called
    // in the Device_init function since during debug time resets, the boot code
    // will not be executed and the gel script will reinitialize all the
    // registers and the calibrated values will be lost.
    // Sysctl_deviceCal is a wrapper function for Device_Cal
    //
    SysCtl_deviceCal();
#endif

    //
    // Turn on all peripherals
    //
    Device_enableAllPeripherals();

    //
    //Disable DC DC in Analog block
    //
    ASysCtl_disableDCDC();


    //
    //Configure GPIO in Push Pull,Output Mode
    //
    GPIO_setPadConfig(22U, GPIO_PIN_TYPE_STD);
    GPIO_setPadConfig(23U, GPIO_PIN_TYPE_STD);
    GPIO_setDirectionMode(22U, GPIO_DIR_MODE_OUT);
    GPIO_setDirectionMode(23U, GPIO_DIR_MODE_OUT);


    //
    // Configure GPIO22 and GPIO23 as digital pins
    //
    GPIO_setAnalogMode(22U, GPIO_ANALOG_DISABLED);
    GPIO_setAnalogMode(23U, GPIO_ANALOG_DISABLED);

}

//*****************************************************************************
//
// Function to turn on all peripherals, enabling reads and writes to the
// peripherals' registers.
//
// Note that to reduce power, unused peripherals should be disabled.
//
//*****************************************************************************
void Device_enableAllPeripherals(void)
{
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HRPWM);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM8);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP4);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP5);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP6);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP7);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD1);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS5);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS6);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS7);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA4);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA5);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA6);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA7);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_LINA);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PMBUSA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSITXA);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXA);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB1);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB2);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB3);
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB4);
}

//*****************************************************************************
//
// Function to disable pin locks and enable pullups on GPIOs.
//
//*****************************************************************************
void Device_initGPIO(void)
{
    //
    // Disable pin locks.
    //
    GPIO_unlockPortConfig(GPIO_PORT_A, 0xFFFFFFFF);
    GPIO_unlockPortConfig(GPIO_PORT_B, 0xFFFFFFFF);
    GPIO_unlockPortConfig(GPIO_PORT_H, 0xFFFFFFFF);
}

//*****************************************************************************
//
// Error handling function to be called when an ASSERT is violated
//
//*****************************************************************************
void __error__(char *filename, uint32_t line)
{
    //
    // An ASSERT condition was evaluated as false. You can use the filename and
    // line parameters to determine what went wrong.
    //
    ESTOP0;
}

over 4 years ago

0 Manoj Santha Mohan over 4 years ago

TI__Guru 55700 points

Vohra,

Which Serial EEPROM are you using? The example was written to work with Serial EEPROM AT25128/256.

Most likely, you might need to adapt this code to different EEPROM.

Also, looking into your code below, you seem be transmitting 0x00. So, you should see only see low signal on SPIMOSI.

        SPI_writeDataBlockingNonFIFO(SPIA_BASE, registers[0]);
        SPI_writeDataBlockingNonFIFO(SPIA_BASE, registers[1]);
        SPI_writeDataBlockingNonFIFO(SPIA_BASE, registers[2]);
        SPI_writeDataBlockingNonFIFO(SPIA_BASE, registers[3]);

Regawrds,

Manoj

0 Alihussain Vohra over 4 years ago in reply to Manoj Santha Mohan

Prodigy 170 points

I have edited spi_eeprom code for tic12400. I am able to read device id but when I try to write any register and read it back then it is not read back properly.

0 Manoj Santha Mohan over 4 years ago in reply to Alihussain Vohra

TI__Guru 55700 points

Vohra,

Based on Figure 33 in tic12400 datasheet,

DEVICE_ID has offset address value of 1, so, you need to configure SPI to transmit (on MOSI pin) 32 bits as show below

1st byte to transmit bits 31:24 0x02

2nd byte to transmit bits 23:16 0xXX (don't care)

3nd byte to transmit bits 15:8 0xXX (don't care)

4th byte to transmit bits 7:0 0xXX (don't care)

CRC has offset address value of 3, so, you need to configure SPI to transmit (on MOSI pin) 32 bits as show below

1st byte to transmit bits 31:24 0x06

2nd byte to transmit bits 23:16 0xXX (don't care)

3nd byte to transmit bits 15:8 0xXX (don't care)

4th byte to transmit bits 7:0 0xXX (don't care)

Check SPIMOSI pin and see whether you are transmitting correct address. Unless you get this correct, read commands won't work correctly for you.

Regards,

Manoj

0 Alihussain Vohra over 4 years ago in reply to Manoj Santha Mohan

Prodigy 170 points

I am writing like this only. I am able to read device ID and CRC register correctly. I am not able to correctly read back IN_EN register when I write 0xFFFFFF to it or to any other register.

0 Manoj Santha Mohan over 4 years ago in reply to Alihussain Vohra

TI__Guru 55700 points

Vohra,

I am writing like this only. I am able to read device ID and CRC register correctly. I am not able to correctly read back IN_EN register when I write 0xFFFFFF to it or to any other register.

This question needs to be answered by someone in tic12400 team as I haven't worked on tic12400 before. I have redirected this post to them.

I expect them to return back to within 2 - 3 business days.

Regards,

Manoj

0 Manoj Santha Mohan over 4 years ago in reply to Manoj Santha Mohan

TI__Guru 55700 points

Vohra,

You haven't provided any details on SPI write command. Based on the datasheet, this is what you need to transmit for write to IN_EN register. Did you make sure to transmit write command as shown below? What does your SPIRXBUF contents? Does it report SPI_FAIL bit set? I would also urge you to share oscilloscope scopeshots of SPI pins.

IN_EN has offset address value of 1B, so, you need to configure SPI to transmit (on MOSI pin) 32 bits as show below for write command.

1st byte to transmit bits 31:24 0xB7 (Bit 31: Write command | Bit 24 is '1')

2nd byte to transmit bits 23:16 0xFF

3nd byte to transmit bits 15:8 0xFF

4th byte to transmit bits 7:0 0xFE (parity 0)

Regards,

Manoj

0 Alihussain Vohra over 4 years ago in reply to Manoj Santha Mohan

Prodigy 170 points

I probe the signal, when I read device id data is showing on MISO pin but when I write to IN_EN register then MOSI don't show any signal... I think there is some problem on MOSI PIN or configuration.

0 Jonathan Nerger over 4 years ago in reply to Alihussain Vohra

TI__Mastermind 34550 points

Can you please provide the signals you see when you probe the pins for us to review? It is very difficult to help identify the source of your problem without being able to check the waveforms for errors.

When you say "I think there is some problem on the MOSI PIN configuration" do you mean that you never see any signals on that pin with you probe? Have you checked that the correct pin is enabled and configured as an output?

Regards,

Jonathan

0 Manoj Santha Mohan over 4 years ago in reply to Alihussain Vohra

TI__Guru 55700 points

Vohra,

I haven't heard back from you for while. Is your issue resolved? Can I close this thread?

Regards,

Manoj

0 Alihussain Vohra over 4 years ago in reply to Manoj Santha Mohan

Prodigy 170 points

My issue was resolved...I was reading data after 4bytes is being transferred but actually we need to read it back after one transfer only.

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TMS320F280049C: SPI in master mode is not working