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HRPWM messes up the PWM in the following condition.
I took the example "Example_2803xHRPWM_PrdUp_SFO_V6" for CCVV4 and changed following lines.
(*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV2;
(*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV2;
It does not work right if the clock is slowed down by 4 or more. The counter goes beyond TBPRD.
Can somebody confirm that ? Is HRPWM suppose to work at full speed only ?
sunil barot said:HRPWM messes up the PWM in the following condition.
I took the example "Example_2803xHRPWM_PrdUp_SFO_V6" for CCVV4 and changed following lines.
(*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV2;
(*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV2;It does not work right if the clock is slowed down by 4 or more. The counter goes beyond TBPRD.
Can somebody confirm that ? Is HRPWM suppose to work at full speed only ?
Sunil,
Please refer to the HRPWM configuration checklist (section 2.3.4.1 High-Resolution Period Configuration) in the HRPWM reference guide ( www.ti.com/lit/SPRUGE8)
Item 3, bullet 2 indicates TBCLK must be set equal SYSCLKOUT.
Regards,
Lori