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TMS320F280049: CAN receive error: casue and handle

Sheldon He
Expert 8585 points
Part Number: TMS320F280049

Hi expert,

My customer's sytem has two notes in CANJ bus, F280049 and a upper machine. In normal working conditons they will exchange frames with eachother.

In special conditions, the upper machine will be rest and in this case F280049 will wait for more than 300ms to receive message again. We find CAN receive error is triggered during this time.

What is the cause of receive error in chip level? 

How could we handle a receive error to minimum the latency of receiving message again when receive error happens?

Thanks

Sheldon 

  • 0
    TI__Mastermind 19795 points

    Hi Sheldon,

    Thanks for your question. The CAN Registers section of the TRM has a register called "CAN_ES", which is the CAN Error and Status Register. This provides all the details on the error conditions (if any) of the CAN module. That should provide the details of the specific type of "receive error" occurring at chip level.

    Regards,

    Vince

  • 0 in reply to Vince
    TI__Expert 8585 points

    Hi Vince,

    We get to know we have receive error from this specific register. But we'd like to know what bus condition will cause a receiver error. Or, how do our device detect a receive error in design or application level.

    Thanks

    Sheldon

  • 0 in reply to Sheldon He
    TI__Mastermind 34785 points

    Hi Sheldon,

    Receive error can be caused by a transmitting node sending an active error flag.  Once receiving nodes detect this active error flag in the bus, their Receive Error Counter will increment by 1.  The transmitting node will send an active error flag if it fails to transmit a message for whatever reasons and the transmitting node's Transmit Error Counter will increment by 8 (I think, but it is more weight than a receive error).  Each node (transmitting or receiving) has both Receive Error Counter and Transmit Error Counter.  For every successful transaction, the counters are decremented accordingly but increase if errors are detected.  The threshold for the receive counter (REC) is 127 and for the transmit counter (TEC) is 255.  If the TEC count goes above 255 counts, it will go bus-off, meaning the transmitting node will completely be isolated from the bus and will stop transmitting.  The transmitting node will then try to recover from this bus-off condition.  Depending on how the transmitter is implemented, it may do it's own check to see how to recover from the errors and try to initialize its CAN module and resume transmission again.

    In F280049, you can monitor these counters (REC, TEC) through CAN_ERRC register.  I'm not sure about the transmitting side and what device  is sending the messages but it also should have receive and error counters.  Maybe that is something that you can have your customer check as these are pretty basic implementations of CAN.  The way you described the errors, I am suspecting that the transmitting side may have reached the transmit error threshold and have gone into bus-off and recovery mode.  That may explain the 300ms delay in receiving the next message.

    Regards,

    Joseph

  • 0 in reply to Joseph Casuga
    TI__Guru* 95315 points

    In special conditions, the upper machine will be rest and in this case F280049 will wait for more than 300ms to receive message again.

    Did you mean to say the upper machine will be "reset"? If so, what causes that reset? How did you determine F280049 "waits" for 300 ms? Are you saying there was a frame intended for 280049, but it did not receive it for 300 ms? Did F280049 go into bus-off? If so, what caused it? 

    We find CAN receive error is triggered during this time. What is the cause of receive error in chip level?

    An error can occur during reception, but there is no such thing as a "receive error". 

    Is your post related to https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/949392/3509843#3509843 ?