CCS/TMS320F28379D: Takes more than 100 seconds to debug in flash

sagar shah54

Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Hello,

I am using Dual core in flash and using core 1 only. SO it is taking aprrox 2 minutes to compile and debug. Is it somehow I can make this faster as I am not using core 2.

Thanks

Sagar

over 7 years ago

0 Krishna Allam over 7 years ago

TI__Expert 7985 points

Hi Sagar,
Can you please provide some clarification...Do you mean that you are compiling and downloading the outfile by selecting only Core 1 and it is taking more than 100 seconds to download? How large is your application? How large is the .out file? Which emulator are you using?
Thanks,
Krishna

0 Vamsi Gudivada over 7 years ago

TI__Guru* 87105 points

Sagar,

Adding another question: Do you have many sections in linker command file (like BIOS users)? If yes, you can use Combine-sections feature in the Flash Plugin GUI to speed up Flash programming.

Note that XDS100 or 110 are low performance emulators. XDS200 is the best choice - not as expensive as XDS510/560 but competes with their performance.

Thanks and regards,
Vamsi

0 sagar shah54 over 7 years ago in reply to Krishna Allam

Expert 2125 points

Yes I am compiling core 1 but somehow it does compiling on core 2 as well. My .out file is 480kb. The time i have mention is from clicking debug and for the code ready for me to resume(F8) on ccs.

0 sagar shah54 over 7 years ago in reply to Vamsi Gudivada

Expert 2125 points

Below is my .cmd File: How much a difference it would make with XDS 200?

MEMORY
{
PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RAMGS14          : origin = 0x01A000, length = 0x001000
   RAMGS15          : origin = 0x01B000, length = 0x001000
   RESET           	: origin = 0x3FFFC0, length = 0x000002
   
   /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */   

PAGE 1 : /* Data Memory */
         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800

   RAMLS5      : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x001000
   RAMGS3      : origin = 0x00F000, length = 0x001000
   RAMGS4      : origin = 0x010000, length = 0x001000
   RAMGS5      : origin = 0x011000, length = 0x001000
   RAMGS6      : origin = 0x012000, length = 0x001000
   RAMGS7      : origin = 0x013000, length = 0x001000
   RAMGS8      : origin = 0x014000, length = 0x001000
   RAMGS9      : origin = 0x015000, length = 0x001000
   RAMGS10     : origin = 0x016000, length = 0x001000
   RAMGS11     : origin = 0x017000, length = 0x001000
   RAMGS12     : origin = 0x018000, length = 0x001000
   RAMGS13     : origin = 0x019000, length = 0x001000

   
   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{
   /* Allocate program areas: */
   .cinit              : > FLASHB      PAGE = 0, ALIGN(4)
   .pinit              : > FLASHB,     PAGE = 0, ALIGN(4)
   .text               : >> FLASHB | FLASHC | FLASHD | FLASHE      PAGE = 0, ALIGN(4)
   codestart           : > BEGIN       PAGE = 0, ALIGN(4)
   ramfuncs            : LOAD = FLASHD,
                         RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
						 
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1        PAGE = 1
   .ebss               : >> RAMLS5 | RAMGS0 | RAMGS1       PAGE = 1
   .esysmem            : > RAMLS5       PAGE = 1

   /* Initalized sections go in Flash */
   .econst             : >> FLASHF | FLASHG | FLASHH      PAGE = 0, ALIGN(4)
   .switch             : > FLASHB      PAGE = 0, ALIGN(4)
   
   .reset              : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   Filter_RegsFile     : > RAMGS0,	   PAGE = 1
   
   SHARERAMGS0		: > RAMGS0,		PAGE = 1
   SHARERAMGS1		: > RAMGS1,		PAGE = 1
   ramgs0           : > RAMGS0,     PAGE = 1
   ramgs1           : > RAMGS1,     PAGE = 1
   
#ifdef __TI_COMPILER_VERSION
	#if __TI_COMPILER_VERSION >= 15009000
	.TI.ramfunc : {} LOAD = FLASHD,
						 RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
						 LOAD_START(_RamfuncsLoadStart),
						 LOAD_SIZE(_RamfuncsLoadSize),
						 LOAD_END(_RamfuncsLoadEnd),
						 RUN_START(_RamfuncsRunStart),
						 RUN_SIZE(_RamfuncsRunSize),
						 RUN_END(_RamfuncsRunEnd),
						 PAGE = 0, ALIGN(4)
	#endif
#endif
   
   /* The following section definitions are required when using the IPC API Drivers */ 
    GROUP : > CPU1TOCPU2RAM, PAGE = 1 
    {
        PUTBUFFER 
        PUTWRITEIDX 
        GETREADIDX 
    }
    
    GROUP : > CPU2TOCPU1RAM, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX :  TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }  
    
   /* The following section definition are for SDFM examples */		
   Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111
   Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222
   Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333
   Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444
   Difference_RegsFile : >RAMGS5, 	PAGE = 1, fill=0x3333
    
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 sagar shah54 over 7 years ago in reply to sagar shah54

Expert 2125 points

Also what kind of Plugin are you talking about? can you give link for it?
Thanks

0 Vamsi Gudivada over 7 years ago in reply to sagar shah54

TI__Guru* 87105 points

Sagar,

Thank you for the update.

You don't have many sections; Combine-sections feature does not help you.
Regarding Plugin: Browse Tools menu in CCS debug view and you will see "On-Chip Flash". This is the Plugin GUI that I am talking about.

Note that compile time is independent of the emulator that you use. You will see an improvement in Flash program time by using XDS200 emulator. You did not tell which emulator you are using.

Thanks and regards,
Vamsi

0 sagar shah54 over 7 years ago in reply to Vamsi Gudivada

Expert 2125 points

I used XDS100v2.
So even though I am using core 1 only it will flash core 2 also?

0 Vamsi Gudivada over 7 years ago in reply to sagar shah54

TI__Guru* 87105 points

Sagar,

Instead of clicking debug, I would suggest to launch the target configuration file (right click on ccxml and launch) and connect to CPU1 to load the code.

Thanks and regards,
Vamsi

0 sagar shah54 over 7 years ago in reply to Vamsi Gudivada

Expert 2125 points

Still taking same time almost.

So even though I am using core 1 only it will flash core 2 also?

0 Vamsi Gudivada over 7 years ago in reply to sagar shah54

TI__Guru* 87105 points

Sagar,

You need to configure the project settings to select which cores you want to be loaded.

Right click on the project -> Properties -> Debug. You will see below configuration. Select as you need.

Thanks and regards,

Vamsi

0 sagar shah54 over 7 years ago in reply to Vamsi Gudivada

Expert 2125 points

I think I selected both core initially but I am not able to find this in properties -> debug.

0 Vamsi Gudivada over 7 years ago in reply to sagar shah54

TI__Guru* 87105 points

Sagar,

I will move this post to CCS team. They can answer your last question.

Thanks and regards,
Vamsi

0 sagar shah54 over 7 years ago in reply to Vamsi Gudivada

Expert 2125 points

So Should I post a new Question or they will answer here?

0 Vamsi Gudivada over 7 years ago in reply to sagar shah54

TI__Guru* 87105 points

Sagar,

They will reply here.

Thanks and regards,

Vamsi

0 Ki over 7 years ago in reply to sagar shah54

TI__Guru**** 450031 points

sagar shah54 said:
I think I selected both core initially but I am not able to find this in properties -> debug.

The easiest thing to do is to delete the debug launch configuration for the project. To do this, go to 'Run -> Debug Configurations' menu in the CCS Edit perspective. Then in the dialog that is opened, look for your debug launch in the left panel. The name of your debug launch should match the name of your project (for a project debug session), or the name of your ccxml file (for a project-less debug session). Then you can right-click on it to bring up the context menu and select Delete.

Then close the dialog and start a debug session for the project again. You will again see the prompt for which CPU to load the code to.

Thanks

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CCS/TMS320F28379D: Takes more than 100 seconds to debug in flash