TMDSHVMTRPFCKIT: Is there any isolation on between MCU GPIOs and IPM on this board?

Ata Khiabani

Part Number: TMDSHVMTRPFCKIT

Hello,

I am looking at the schematics of the TMDSHVMTRPFCKIT and I have not been able to find any isolation such as optocouplers between GPIOs of the MCU and the gates of the IPM. I see that there is PWM overlap protection using NAND and AND gates but I was wondering if there is any isolation between GPIOs and IPM?

Regards,

Ata

over 4 years ago

0 Ramesh Ramamoorthy over 4 years ago

TI__Mastermind 27240 points

There is no opto isolation, what you see in the schematic is what it is.

0 Ata Khiabani over 4 years ago in reply to Ramesh Ramamoorthy

Intellectual 780 points

Thank you for the response.

So how can we be sure that nothing happens to MCU in case of IGBT malfunction? I mean if for instance one the IGBTs malfunction, then there should be some kind of isolation so that the MCU is not harmed, right? Are the gate drivers provide such isolation?

0 Ramesh Ramamoorthy over 4 years ago in reply to Ata Khiabani

TI__Mastermind 27240 points

The IPM has a gate driver and the MCU feeds into the gate driver and not IGBT directly. In the event of a backward migration of fault from the inverter damaging the driver, the MCU may take a hit. But non-isolated config is pretty common in low end apps and this EVM covers that.

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TMDSHVMTRPFCKIT: Is there any isolation on between MCU GPIOs and IPM on this board?