In the F280049C, there is a maximum step response settling time listed for the PGA's. However, really looking to quantify from a ramp response perspective. For example, if there is signal that ramps from DC to X Volts/mSec into the PGA input, what is the ramp response at the PGA output (independent of filters)?
Another way to look at this is to characterize as a second order system. If so, then could parameterize in MATLAB and simulate expected ramp response. This does start to get a little complicated from a PVT perspective... So not sure what the best approach is. Looking for some guidance to understand ramp settling time and steady state error.