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TIDA-00961 AQSFRC Register

Hi

This Inoue

I have a question.
in epwm.h

static inline void
EPWM_setActionQualifierContSWForceAction(uint32_t base,
EPWM_ActionQualifierOutputModule epwmOutput,
EPWM_ActionQualifierSWOutput output)
{
//
// Check the arguments
//
ASSERT(EPWM_isBaseValid(base));

//
// Initiate a continuous software forced output
//
if(epwmOutput == EPWM_AQ_OUTPUT_A)
{
HWREGH(base + EPWM_O_AQCSFRC) =
((HWREGH(base + EPWM_O_AQCSFRC) & ~EPWM_AQCSFRC_CSFA_M) |
((uint16_t)output));
}
else
{
HWREGH(base + EPWM_O_AQCSFRC) =
((HWREGH(base + EPWM_O_AQCSFRC) & ~EPWM_AQCSFRC_CSFB_M) |
((uint16_t)output << EPWM_AQCSFRC_CSFB_S)) ;
}
}

Why does EPWM _ AQCSFRC _ CSFA _ M have a logical negation?

SPRUI 33 C – November 2015 – Revised August 2019 page 1981 shows that OTSFA is triggered by the lower 2 bits ~ EPWM _ AQCSFRC _ CSFA _ M causes the lower 2 bits to be zero regardless of output.

Also, ~ EPWM _ AQCSFRC _ CSFB _ M is defined as 0xCU, in which case OTSFB is 5 bits and does nothing regardless of opput.

If the library is correct, then SPRUI 33 C is wrong, and if SPRUI 33 C is correct, then the library is wrong. Currently, calling EPWM _ setActiveQUalifierContSWForceAction has no effect on the output.

Which should I believe?
Please tell me.

  • Hi,

    The EPWM_AQCSFRC_CSFA_M hold the value 0x3 (0b11) -- on negation it will be 0b00 which is just a disable state for the software force event.

    The logical AND is performed to eliminate any already written values to the CSFA bits, performing logical AND with 0b00 will help clear the existing values. Same is being done with CSFB_M as well, just the bits are left shifted by 2. Later we are performing a logical OR with the "output" that is needed by the user which will ensure the software force event as per the requirement.

    For the TRM SPRUI33, there are two kinds of software forced events - One Time Software Force (OTSFA) and Continuous Software Force (CSFA), the lower 2 bits (CSFA_M) are for the continuous software force event present in the AQCSFRC register while the lower 2 action bits for OTSFA are present in the AQSFRC register ACTSFA[1:0]. You may refer to the TRM for more details on each of the registers for software force event.

    Hope this helps.

    Thanks,

    Aditya

  • Thank you for your reply.
    There are some things I want to confirm.

    Q1. I thought the = operator in the c language would evaluate the right-hand side and then assign it to the left-hand side. According to your answer, you first clear the left side (Write Zero). The next | operator sets a bit on the left side. The= operator write twice on the left side. Is this correct? I didn't know where this was in the compiler manual.
    Q2.Table 18-50. AQSFRC Register Field Descriptions ,Bit0-1:ACTSFA and Bit 3-4:ACTSFB. However The source code handles OutPutA for Bit 0-1 , OutPutB for Bit 2-3, Is it Bit location for B was shifted by a bit.
    Please answer without hesitation.

  • 1. 

            HWREGH(base + EPWM_O_AQCSFRC) =
                    ((HWREGH(base + EPWM_O_AQCSFRC) & ~EPWM_AQCSFRC_CSFA_M) |
                     ((uint16_t)output));
    .
    Part 1: (HWREGH(base + EPWM_O_AQCSFRC) & ~EPWM_AQCSFRC_CSFA_M) -- clears the existing values in the CSFA bits, if any.
    *Check the bracket wise allocation to get a clear picture of how the process flows.
    Part 2: (Result of Part 1) | ((uint16_t)output)); -- Ensures the desired output for the software force event.
    .
    Part 3: The final result on the RHS of the '=' operator is assigned to the mentioned register address on the LHS (i.e. HWREGH(base + EPWM_O_AQCSFRC))
    2. 
    user805897 said:
    The source code handles OutPutA for Bit 0-1 , OutPutB for Bit 2-3
    The source code handles output B for bits 3-4 as well, not for bits 2-3.
     HWREGH(base + EPWM_O_AQSFRC) =
                        ((HWREGH(base + EPWM_O_AQSFRC) & ~EPWM_AQSFRC_ACTSFB_M) |
                         ((uint16_t)output << EPWM_AQSFRC_ACTSFB_S));
     
    The above shown source code snippet is for the AQSFRC event taken from epwm.h. The value assigned to [EPWM_AQSFRC_ACTSFB_M] is 0x18 i.e. 0b11000 (bits 3-4 are getting affected)
    P.S. There are two software force events as I mentioned earlier, AQSFRC and AQCSFRC. Just take care that they are understood separately, else it might lead to confusion in understanding the bit wise allocation and operation. Feel free to reach out for any issue that you face.
    Thanks,
    Aditya
  • Thank you for your reply.
    The source code I have is 0xCU for EPWM _ AQCSFRC _ CSFB _ M and 2U for EPWM _ AQCSFRC _ CSFB _ S. This value has been modified.

    pfc2philtrmtpl _ main.c Per line 1192~

    if ((no _ switching = = 0) & & (si _ FET _ on = 1))
    {
    if (neg _ cycle = = 0)// positive input cycle
    {
    //High side FET switch is ON. Low side FET switch is OFF
    EPWM _ setActiveQUalifierContSWForceAction (LOW _ FREQ _ PWM _ BASE,
    EPWM _ AQ _ OUTPUT _ B,
    EPWM _ AQ _ SW _ OUTPUT _ LOW);
    EPWM _ setActiveQUalifierContSWForceAction (LOW _ FREQ _ PWM _ BASE,
    EPWM _ AQ _ OUTPUT _ A,
    EPWM _ AQ _ SW _ OUTPUT _ HIGH);
    }
    else// (neg _ cycle = = 1)// negative input cycle
    {
    //Low side FET switch is ON. High side FET switch is OFF.
    EPWM _ setActiveQUalifierContSWForceAction (LOW _ FREQ _ PWM _ BASE,
    EPWM _ AQ _ OUTPUT _ A,
    EPWM _ AQ _ SW _ OUTPUT _ LOW);

    EPWM _ setActiveQUalifierContSWForceAction (LOW _ FREQ _ PWM _ BASE,
    EPWM _ AQ _ OUTPUT _ B,
    EPWM _ AQ _ SW _ OUTPUT _ HIGH);
    }
    }

    A state change should appear in the high side FET and the low side FET, but for some reason both high and low remain OFF.
    The forced event has the highest priority, so it should be ON or OFF, but it is still OFF.
    Please tell me how to fix this.

  • Hi,

    Yes, it should be on and off as you mentioned. Have you checked if the protection is triggered?

    Regards,

    Chen

  • Hi Thank you for your answer,

    I wonder the Protection trigger means if which EPWM_forceActionQualifierSWAction called?
    The project pfc2philtrmttpl_F28004x is never called the function EPWM_forceActionQualifierSWAction.

    I will modify problem for this issue below.
    Is it right. Or Is there a better way?

    if ((no_switching == 0) && (si_FET_on==1))
    {
    if (neg_cycle == 0) // positive input cycle
    {
    // High side FET switch is ON. Low side FET switch is OFF
    EPWM_setActionQualifierContSWForceAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_B ,
    EPWM_AQ_SW_OUTPUT_LOW);
    EPWM_forceActionQualifierSWAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_B);


    EPWM_setActionQualifierContSWForceAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_A ,
    EPWM_AQ_SW_OUTPUT_HIGH);
    EPWM_forceActionQualifierSWAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_A);
    }
    else //(neg_cycle == 1) // negative input cycle
    {
    // Low side FET switch is ON. High side FET switch is OFF.
    EPWM_setActionQualifierContSWForceAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_A ,
    EPWM_AQ_SW_OUTPUT_LOW);
    EPWM_forceActionQualifierSWAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_A);

    EPWM_setActionQualifierContSWForceAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_B ,
    EPWM_AQ_SW_OUTPUT_HIGH);
    EPWM_forceActionQualifierSWAction(LOW_FREQ_PWM_BASE,
    EPWM_AQ_OUTPUT_B);
    }
    }

  • Hi I made change source code above but nothing do PWM status.


    EPWM_setActionQualifierContSWForceAction was access base+EPWM_O_AQCSFRC is offset 0x49 therefore
    EPWM_AQCSFRC_CSFB_M is 0xCU , EPWM_AQCSFRC_CSFB_S = 2U

    May I it call the
    EPWM_setActionQualifierContSWForceShadowMode(uint32_t base,EPWM_ActionQualifierContForce mode);

    is need?
    which select for mode in this case.
    00: Load on event counter equals zero
    01: Load on event counter equals period
    10: Load on event counter equals zero or counter equals period
    11: Load immediately (the active register is directly accessed by the
    CPU and is not loaded from the shadow register).
    I will chose 11.

  • Hi,

    I got confused about your latest questions.

    The intention of my last reply was trying to ask you check whether the PWM is turn off by the "tripzone" for some reason. 

    I think you have to take a look at several PWM register to see if they are set correctly based on the logic. Just for the debugging, you can add two flags in each branch(neg_cycle == 0 and neg_cycle == 1) to first check whether you enter the branch or not, then check the PWM registers accordingly and see if the expected change happen.

    Sorry, I could only help you from the high level. This usually takes some efforts to figure it out. But the original code should work fine.

    Regards,

    Chen 

  • I noticed the following.
    When viewed in the debugger, the required register is always 0.
    No matter what value you set, the register is set to 0 from the debugger.
    Therefore, I think the IC chip is cracked. The Ti evaluation will be available tomorrow. Verify normal operation with the same large head.

  • OK, let us know if that helps. If not, we may need to further look into whether there are conflict actions caused by other code.

    Regards,

    Chen

  • I have replaced the MCU and maked it possible to write to the registers.However, the PWM output still does not appear.
    In pfc2philtrmttpl_Board.h, line 203, void setPinsAsPWM();
    is declared on line 203 of pfc2philtrmttpl_Board.h.
    Definition at line 927 of file pfc2philtrmttpl_Board.c.
    This routine is called in line 335 of file pfc2philtrmttpl_main.c.
    Line 799 of gpio.h has extern void
    GPIO_setDirectionMode(uint32_t pin, GPIO_Direction pinIO);
    but I don't know where the definition is.
    Similarly, extern void
    GPIO_setPadConfig(uint32_t pin, uint32_t pinType);
    Similarly, extern voidextern void GPIO_setPadConfig(uint32_t pin, uint32_t pinType); does not know where to find the definition.
    Similarly, extern voidextern void
    GPIO_setPinConfig(uint32_t pinConfig);
    I don't know where to find the definition.
    Pinconfig.h and pinconfig.c do not exist in the project.
    These routines, I assume, are in Pinconfig.x?
    I am not getting any compile errors or link errors.
    I will continue to look at the registers directly, as it may be that gpio is not set correctly.

    Translated with www.DeepL.com/Translator (free version)