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Hello,
I am trying to debug an assembly code that enters/exits LPM4.5 by using IAR 7+ and USB-IF emulator thorugh Spy-Bi-Wire.
I read on slau138as (Table 2-1) that there is no LPMx.5 debugging support for FR2433 (even if debugger options include the checkbox 'Enable ULP/LPMx.5 debug') so, based on slaa424 (chapter 2) I assume I have to enter LPM4.5 by selecting 'Release JTAG on Go' and 'Leave Target Running' options (for IAR). Then, in order to wake from LPM4.5 (par. 2.3), as I use I/O port as interrupt sources, I have to include a software debug trap in the application code such as:
; SW trap for LPM4.5
lpm5_wait
bit.w #0x0080,&PAIN ; -- execution will stop here as long as
jz lpm5_wait ; input is low
; This could be used to synch up the debugger
; and continue to debug from here after LPM4.5
My questions are the following:
1) Is this procedure correct and the only one available to debug LPM4.5?
2) Unfortunately when entering LPM4.5 the debugger loses control and forces a reset even if I execute through the 'RUN' Command (not single stepping). Any idea of what could be wrong?.
3) Slaa424 (chapter 3) also refers to a demo with source code showing how to enter and exit LPM4.5 using this debugginq techniques. I have not found such demo code. Could you tell me where to find it (possibly assembly code, not c-code)?
Many thanks in advance.
Mauro
Hi Mauro,
I can' t find the source code either. The theory is just to judgement if the device is wakeup from LPMx.5 by check the value in SYSRSTIV that also exist in FRAM devices. And hold the device in a while loop to re-build connection with PC. More details about the operation enter/exit LPMx.5 you can also refer to the user's guide SLAU445 at section 1.4.3
You can also refer the demo code here https://dev.ti.com/tirex/explore/node?node=AJfpTD2Guk5hY1MLy3Wl6w__IOGqZri__LATEST
Hi Gary,
thanks for your reply. I made some further investigations and found that:
- just before entering LPM4.5 I had to use 'BIS #GIE+CPUOFF+OSCOFF+SCG0+SCG1, SR' instead of 'BIS #CPUOFF+OSCOFF+SCG0+SCG1, SR' in order to clear any unwanted pending interrupt that (I assume) was likely to prevent from entering LPM4.5.
- so MSP-FET430UIF with IAR 7+ fully support debug of LPM4.5 on FR2433 without any use of code trap or other modifications to the application code (should Table 2-1 in slau138 - sayng there is no LPMx.5 Debugging Support in IAR for FR2433 - be updated?)
- enter/exit from LPM4.5 (I use interrupt from I/O port P2 to wake it up) work correctly without any wait loop (I just test SYSRSTIV, as you suggested), see attached picture.
Best regards,
Mauro
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