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MSP430FR2433: Minimizing current consumption in LPM4.5

Mauro Trespidi
Prodigy 230 points
Part Number: MSP430FR2433
Other Parts Discussed in Thread: MSP-FET

Hello,

I am trying to lower current consumption in LPM4.5. I am using SBW so I pulled-up the RST pin with a 47k resistor as described in SLAU278AH, Figure 2-3. Then I discovered that the internal pull-up resistor is enabled by default (SYSRSTRE = 1 by default as specified in Family UG). My questions are:

1) SYSRSTRE shall be explicity cleared before entering LPM4.5 to minimize current consumption?

2) Is the internal pull-up assumed enabled (without external 47k) or disabled (with external 47k) when computing the 16nA value stated in FR2433 D/S, Table 6-1?

The NOTE to the FR2433 D/S, Table 6-1, states: 'XT1CLK and VLOCLK can be active during LPM4 if requested by low-frequency peripherals, such as RTC or WDT.'. My further question is:

3) Is this also valid for LPM4.5 or may I assume that, in LPM4.5, XT1CLK and VLOCLK are always shut-down (and generate no additional current consumption) and no peripheral can keep them alive?

Many thanks in advance,

Mauro

  • +1
    TI__Genius 16995 points

    Hi Mauro,

    Mauro Trespidi said:
    1) SYSRSTRE shall be explicity cleared before entering LPM4.5 to minimize current consumption?

    When there is a external pull-up resistor, internal pull-up resistor could be disabled.

    Meanwhile, in SHUTDOWN mode, The register content of all modules and the CPU is lost, which means the SYSRSTRE lost its status. So, I assume it will have no effect. Can you have a try and see whether it will have some difference.

    Mauro Trespidi said:
    2) Is the internal pull-up assumed enabled (without external 47k) or disabled (with external 47k) when computing the 16nA value stated in FR2433 D/S, Table 6-1?

    I assume it is with a external pull-up resistor. the 16nA value may not contain the leakage current.

    I will ask releant experts about this, and give you the feedback.

    Mauro Trespidi said:
    3) Is this also valid for LPM4.5

    No, LPM4.5 doesn't support it.

    B.R.

    Sal

  • 0 in reply to Sal Ye
    Prodigy 230 points

    Hi Sal,

    many thanks for your reply.

    while in LPM4.5 I measure the following voltages across the 47k resistor between RST and Vcc (3.3V):

    • 15mV, when SYSRSTRE = 0, that is internal pullup disabled
    • 9mV, when SYSRSTRE = 1, that is internal pullup enabled

    In both cases V(RST) > Vcc, so the MSP-FET is driving RST with a voltage greater than Vcc that seems quite strange.

    Wether these voltages are expected, I suppose that the currents associated to them are to be considered as 'external currents' in D/S par. 5.8 ('Low-Power Mode LPMx.5 Supply Currents (Into VCC) Excluding External Current') otherwise there could be a failure in my MSP-FET or a wrong setting that should be investigated.

    B.R.

    Mauro

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