MSP430F6779A: About PMM26 with setting RST Pin setting to NMI and pull low

For MCU to switch reset funtion to NMI funtion. It need some time. So it is possible that the actual NMI function enable is later than the register setting. I think that is  why still suggest ask you add a timeout. If your MCU power sequence is not so tight. I would suggest you to refer to the previous suggestions.

Hi Eason Zhou,

Thank you for advice.

1) In case we access SVSMLCTL via library
Driver library version 2_91_11_01

in pmm.c

PMM_setVCoreUp
PMM_setVCoreDown

Does the library implement the timeout 300 us?
If not, how do we implement timeouts?

2) After the timeout, what should we do, like reset or something?

3) In this case, we can check SVSMLDLYIFG or SVSMLDLYST can be used interchangeably right?

1) I think you can check the source code by yourself. Actually, it doesn't realize this function. I would suggest for this part of code, directky control the register.

2) You don't need to do anything, check SVSMLDLYIFG flag is to make sure teh delay finished. If you don't add a timeout. You may trapped in the SVSMLDLYIFG  == 1 check. 

3) Not really, SVSMLDLYIFG is set after SVSMLDLYST. Besides, for the Errata, it only refer to SVSMLDLYIFG. So I would suggest you to follow it, as I can only share comment based on the words from User's guide and Errata. I don't have any more additional information.

Hi Eason Zhou,

Thank you for information.

1) If the errata occurs in the library (PMM_setVCoreUp, PMM_setVCoreDown.

Is the program stuck in a polling loop in the library?

    //Wait until SVM, SVS low side is settled
    while ((HWREG16(PMM_BASE + OFS_PMMIFG) & SVSMLDLYIFG) == 0) ;

3) In my current source code check SVSMLDLYST, is it necessary to change it to SVSMLDLYIFG instead??

SVSMLCTL    =   0x4703;
// SVMLE = 0b1 (SVM low-side enable)
// SVSLE = 0b1 (SVS low-side enable)
// SVSLRVL = 0b11 (SVS low-side reset voltage level 2.16 V)
// SVSMLRRL = 0b101 (SVS low-side reset release voltage 2.25 V)
while ((SVSMLCTL & SVSMLDLYST) != 0)
{
 // SVSMLDLYST: wait until the status finished
}

1) No, the problem is that it will trap in the loop by checking  while ((HWREG16(PMM_BASE + OFS_PMMIFG) & SVSMLDLYIFG) == 1)

2) I would suggest you make a change like this:

while ((HWREG16(PMM_BASE + OFS_PMMIFG) & SVSMLDLYIFG) == 0);

while ((HWREG16(PMM_BASE + OFS_PMMIFG) & SVSMLDLYIFG) == 1)

{

  count++;

  if (count>200)   //Asume the freq is 1Mhz

     break;

}

Hi Eason Zhou,

This suggested code is intended to wait for 300 us, right?

while ((HWREG16(PMM_BASE + OFS_PMMIFG) & SVSMLDLYIFG) == 0);

while ((HWREG16(PMM_BASE + OFS_PMMIFG) & SVSMLDLYIFG) == 1)

{

  count++;

  if (count>200)   //Asume the freq is 1Mhz

     break;

}

For accurate time, you need to refer to the assembly code to know how many command in a cycle. Here is just an example.