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Original question:

MSP430FR5969-SP: ECC coverage - FRAM, Register, RAM(SRAM)

MSP430FR5969-SP: Bit flip possibility after the program was load to SRAM from FRAM.

Yuta Ishii
Prodigy 505 points
Part Number: MSP430FR5969-SP

Tool/software:

Hi Team,

Although FRAM has ECC function, SRAM does not have ECC.

- Is there possibility of bit flip program error after the program was load to SRAM from FRAM? 

- Do you recommend to shut down this device occasionally when we use it in space to minimize the error? 

- Do you recommend using this device run 24 hours without shutdown?

Best regards,

Yuta Ishii

  • 0
    TI__Mastermind 33875 points

    Due to the SRAM do not have the erase cycle limitation, it seems vary litter probability that bit flip in SRAM.  

    Have you check if FRAM data corruption?

    Few tips here to check

    1. Check FRAM wait state
    2. Check any power supply over spec

    1. Check FRAM protection feature open
    2. Check SVS open
    3. Add VCC monitor
  • 0 in reply to Gary Gao
    Guru 19645 points

    CMOS SRAM would appear to be as susceptible to radiation problems as anything else. A search quickly turned up a NASA document where they tested various SRAM chips. Possibly smaller feature sizes so not comparable but it should give a taste of the problem.

    If this is really a concern then I would be moving things (stack, variables) out of SRAM and into FRAM. Not moving code into FRAM.

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