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CCS/MSP430FR5969: FRAM SRAM write speed.

Mirae Kim
Intellectual 450 points
Part Number: MSP430FR5969

Tool/software: Code Composer Studio

Hello, 

I am using MSP430FR5969 device. 

I tested FRAM and SRAM write latency with FRAM speed application which TI provides. 

I just changed the FRAM_WRITE_START address to SRAM region to measure SRAM write speed. 

I attached the picture below. 

But the weird thing was energy consumption was different but the latency was almost the same. 

I thought FRAM should have about 3 times slower than SRAM. 

(I measured latency with energy trace. I made the led toggle after finish writing then the power goes high when it finishes writing)

Does anybody have clue about this result? 

Or does anybody have documents about SARM and FRAM write speed? 

Best, 

Mirae

  • 0
    Guru 34453 points

    DMA for Flash to RAM or  RAM to RAM will take 2 cycles foreach word (on any MCLK for non FRAM devices), for example if you are coping data from Flash to RAM, or from input port to RAM. If there is no waiting states for FRAM (MCLK <= 8 MHz), with the same MCLK, number of cycles should be the same.

    it is explained here...

    http://www.ti.com/lit/an/slaa498b/slaa498b.pdf

    If you want to check RAM, make RAM to RAM DMA and everything should be clear.

  • 0 in reply to zrno soli
    Intellectual 450 points
    Hello,

    Thank you for the reply.
    I understand what you mean.
    I have one more question to ask.
    I changed the memory configuration setting of my application.
    For example, I changed the linker script file.

    The default setting was

    .code >FRAM
    .data >RAM
    .stack >RAM

    but I changed it to like this below.

    .code >FRAM
    .data >FRAM
    .stack >FRAM

    I know it will be different depending on the memory access patterns of the application,
    But I thought at least the execution time should have to be different.
    When I measure the execution time of the application with these two memory settings above, The execution time was the same even if I did not use DMA in this application.

    Do you have any idea with this?

    Best,
    Mirae
  • 0 in reply to Mirae Kim
    Guru 34453 points

    If wait states are not used (MCLK <= 8 MHz) than execution time should be the same.

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