Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

MSP430F5342: Implementing Watch Dog Timer Functionality Using MSP

Part Number: MSP430F5342

Tool/software:

Hi Team,

I am planning to implement a watch dog timer's functionality using MSP430F5342IRGZR. We are planning to send a reset pulse for every 200ms from an FPGA device to the Pin No. 5 (A GPIO) of  MSP430F5342IRGZR.

Also we have connected Pin 37 (A GPIO) of MSP430F5342IRGZR to the reset pin of that FPGA. We are planning to program MSP430F5342IRGZR such as if pin no. 5 is not receiving a reset pulse for every 200ms from the

FPGA, then MSP will wait for a duration of 200ms and issue a reset signal to the FPGA. 

Whether this is possible? Request you to provide feedback on this idea.

  • Hi Sam,

    From my understanding, you want to use MSP430 as a watch dog and use FPGA to achieve your main application functions right? 

    Here are some comments on it:

    1. The idea is totally OK, but it is a little "waste" to use MSP430 only as a watch dog function.

    2. You could define a timer in MSP430 (assume down counting), and reload the timer counter if a external signal from FPGA raised (for example in a GPIO interrupt). If the timer counter runs to zero (after 200ms), raise a GPIO signal output to reset FPGA.

    Best Regards,

    Pengfei

  • Possible. Easy even. But a lousy watchdog.

    https://www.ganssle.com/watchdogs.pdf describes better ways to design watchdogs and even mentions a specific TI part designed to do what you want. No need to waste a general purpose micro-controller.

**Attention** This is a public forum