MSP430G2553 I2C connection to MCP4525 Eval Board

I've had no success getting the MSP430G2553 (Mounted on a TI Launch Pad) to talk to the MCP4725 DAC EVAL Board.

I have verified that the tx interrupt vector ISR is being called at a hig rep-rate (whether the Eval Board is connected to the msp or not).

I still havent figured out how to verify that a real ACK has come back from the MCP4725.

I'm using the pullup resistors on the MCP Eval board. 

The code below atempts tto usesimple "FAST MODE" to talks to the MCP.

Every date transfer to UCB0TxBF results in a USCI0TX_ISR call. Thes occure even when the board is not connected.

Does anyon have this combination of devices working (or somethin VERY close to it)? I would sure appreciate a look at it. Any insights form you good people out there would be great.

What is a bedrock means of determining that the 430 and MCP are talking at the most fundamental level?

My code is shown below.

#include <msp430g2553.h>
volatile unsigned int i;
void FaultRoutine(void);
void ConfigWDT(void);
void ConfigClocks(void);
void TI_USCI_I2C_transmit(unsigned char , unsigned char * );
volatile int scans,stat[5];
void XI2C_Init(void);
unsigned char TI_USCI_I2C_slave_present(unsigned char slave_address);
unsigned char slaveAdd=0xc0>>1;
unsigned charllk sn;
void main(void)
{  
  sn=0; 
  ConfigWDT();
  ConfigClocks();
  if(TI_USCI_I2C_slave_present(slaveAdd)){
   P2OUT=5;
  }
  _BIS_SR(GIE);              // Turn on interrupts
  XI2C_Init();   
  while(1)
  {
   P1OUT |= BIT0;                // turn on red LED            
   for (i = 100; i > 0; i--);               // wait
   P1OUT &= ~BIT0;                      // turn off red LED
   for (i = 5000; i > 0; i--);    // wait
  }
}//end main

//************************************************************************
void XI2C_Init()
{
   P1SEL |= BIT6 + BIT7; // Assign I2C pins to USCI_B0
   UCB0CTL1 |= UCSWRST;    
   UCB0CTL0 = UCMODE_3 + UCMST +  UCSYNC;     // I2C, Master, synchronous mode
   UCB0CTL1 = UCSSEL_2 + UCSWRST;             // Use SMCLK, keep SW reset
   UCB0BR0 = 12;                             // fSCL = SMCLK/12 = ~100kHz
   UCB0BR1 = 0;
   UCB0I2CSA = 0xC0>>1;                   // Set slave address C0>>
   UCB0CTL1 &= ~UCSWRST;                     // Clear SW reset, resume operation
   IFG2&=~UCB0TXIE;
   IE2 = UCB0TXIE;                          // Enable TX ready interrupt
   UCB0CTL1 |= UCTR + UCTXSTT;               // I2C TX, start condition
   sn=0;
   UCB0TXBUF = 0x00;                         // Write MSB Mode bits, PD BIts, Data MSB
               // Fast Mode (bit 7,6=0,0) (PD bits 5,4=0,0),
               // data bits 11-8
 
 }
 //------------------------------------------------------------------------------
unsigned char TI_USCI_I2C_slave_present(unsigned char slave_address){
  unsigned char ie2_bak, slaveadr_bak, ucb0i2cie, returnValue;
  ucb0i2cie = UCB0I2CIE;                      // restore old UCB0I2CIE
  ie2_bak = IE2;                              // store IE2 register
  slaveadr_bak = UCB0I2CSA;                   // store old slave address
  UCB0I2CIE &= ~ UCNACKIE;                    // no NACK interrupt
  UCB0I2CSA = slave_address;                  // set slave address
  IE2 &= ~(UCB0TXIE + UCB0RXIE);              // no RX or TX interrupts
  __disable_interrupt();
  UCB0CTL1 |= UCTR + UCTXSTT + UCTXSTP;       // I2C TX, start condition
  while ((UCB0CTL1 & UCTXSTP)==0){           // wait for STOP condition
  }
 
  returnValue = !(UCB0STAT & UCNACKIFG);
  __enable_interrupt();
  IE2 = ie2_bak;                              // restore IE2
  UCB0I2CSA = slaveadr_bak;                   // restore old slave address
  UCB0I2CIE = ucb0i2cie;                      // restore old UCB0CTL1
  return returnValue;                         // return whether or not
                                              // a NACK occured
}
//************************************************************************
 
 
#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCI0TX_ISR(void)
{
  unsigned char a; 
  if (IFG2 & UCA0TXIFG){
      a=(P2OUT & ~0x3F);
      a|=(~(scans>>8 & 0x3f));
      P2OUT = a;
     
      if(sn==1){//send LSB
      //UCA0TXBUF = 0xff;//scans & 0xff;//*TI_transmit_field;
     /*while((UCB0CTL1 & UCSCLLOW)==0){
      ;
     }**/
      scans++;
      sn=0;
      IFG2 &= ~UCA0TXIFG;
      }
      if(sn==0){//send MSB (4-bits)
       //UCA0TXBUF = 0x0f;//scans>>8 & 0x0f;//*TI_transmit_field;
     /*while((UCB0CTL1 & UCSCLLOW)==0){
      ;
     }*/
       sn=1;
       IFG2 &= ~UCA0TXIFG;
      }
  }

}
void ConfigWDT(void)
 {
 WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer 
 }

void ConfigClocks(void)
 {
 if (CALBC1_1MHZ ==0xFF || CALDCO_1MHZ == 0xFF)                                      
   FaultRoutine();                      // If calibration data is erased
                                 // run FaultRoutine()
  BCSCTL1 = CALBC1_1MHZ;      // Set range
  DCOCTL = CALDCO_1MHZ;       // Set DCO step + modulation
  BCSCTL3 |= LFXT1S_2;                      // LFXT1 = VLO
  IFG1 &= ~OFIFG;                           // Clear OSCFault flag
  BCSCTL2 |= SELM_0 + DIVM_3 + DIVS_3;      // MCLK = DCO/8, SMCLK = DCO/8 
 }
 
void FaultRoutine(void)
 {
   P1OUT = BIT0;                            // P1.0 on (red LED)
   while(1);                        // TRAP
 }
 

#pragma vector = USCIAB0RX_VECTOR
__interrupt void USCIAB0RX_ISR(void)
{
  if (IFG2 & UCNACKIFG){            // send STOP if slave sends NACK
    UCB0CTL1 |= UCTXSTP;
    UCB0STAT &= ~UCNACKIFG;
    //P2OUT|=BIT2;
  }

}